Memory Controller Poison Tracking for Low-Overhead Reliability
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Solution Overview
Problem
Existing memory systems struggle to efficiently track and log memory errors, particularly in non-server contexts like mobile devices, where power consumption and circuit area considerations limit the implementation of server-grade reliability features.
Innovation Solution
A memory controller forces uncorrectable errors for corrupted data to maintain a 'poison' status, tracks correctable and uncorrectable errors, and performs demand scrubs to correct errors without increasing power or area, using techniques like LPDDR5 memory and demand scrub circuitry.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If server-grade memory reliability features (redundant storage, extensive ECC fields) are implemented, then memory reliability is improved, but power consumption and circuit area increase
Solution Approach 1:
The patent extracts and tracks only the essential error information (error addresses, error counts) separately from the main data storage, rather than implementing full server-grade redundant storage systems. This allows error tracking functionality to be maintained with minimal additional power consumption and circuit area.
Solution Approach 2:
The patent implements partial error correction by tracking correctable errors and applying correction only to specific error cases rather than comprehensive server-grade ECC protection. This provides sufficient reliability for non-server applications while avoiding the excessive power consumption and area requirements of full server-grade implementations.
2Reliability
If server-grade memory reliability features (redundant storage, extensive ECC fields) are implemented, then memory reliability is improved, but circuit area increases
Solution Approach 1:
The patent extracts error tracking information into separate, compact data structures (error address registers, error count counters) rather than implementing extensive ECC fields throughout the memory system. This reduces circuit area while maintaining the ability to track and correct errors.
Solution Approach 2:
The patent uses simple, low-cost error tracking mechanisms (basic counters and address registers) that consume minimal circuit area, replacing the need for expensive, area-intensive server-grade redundant storage and extensive ECC hardware.
3Measurement precision
If corruption indicators are maintained for all data blocks, then data corruption tracking is improved, but memory resources are consumed
Solution Approach 1:
The patent extracts corruption tracking information into separate error address registers and counter structures rather than maintaining full corruption indicators for every data block. This reduces memory resource consumption while preserving the ability to accurately track which specific blocks have experienced errors.
Solution Approach 2:
The patent implements partial tracking by maintaining error information only for blocks that have actually experienced errors, rather than maintaining corruption indicators for all possible data blocks. This reduces memory resource usage while maintaining accurate tracking of problematic blocks.
Data Source
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AI summary
Techniques are disclosed relating to improving memory reliability, e.g., in the context of memory circuits with limited reliability features. In some embodiments, memory controller circuitry is configured to communicate with memory circuitry via an interface that supports link error detection. The memory controller circuitry may, based on a corruption indicator, transmit a data and parity combination for the first data block that causes the memory circuitry to detect an uncorrectable write interface error. Subsequent reads of the location may therefore cause an uncorrectable error indication. This may advantageously allow the memory controller circuitry to propagate a corruption indicator as an uncorrectable error in the memory circuit, without requiring additional tracking of the indicator by the memory circuit or memory controller, in some embodiments.