Memory Polynomial Predistortion Filter for PA Linearity
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Solution Overview
Problem
Existing power amplifiers in communications transmitters often become nonlinear outside their optimum operating range, leading to signal distortion, which is challenging to address efficiently, especially in low power communications like satellite relay communications, and existing predistortion filter methods can be cumbersome and resource-intensive.
Innovation Solution
An electronic device with a memory polynomial predistortion filter that includes multiple finite impulse response (FIR) filter stages and a summer, configured to operate in parallel, along with multipliers that input products of input samples and their absolute values, to efficiently compensate for power amplifier nonlinearity, implemented in digital signal processors or field-programmable gate arrays.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the optimum operating range of the power amplifier is increased to reduce nonlinearity, then signal linearity is improved, but the size and complexity of the power amplifier increase
Solution Approach 1:
The patent introduces a predistortion filter as an intermediary device between the signal generator and the power amplifier. This filter applies inverse distortion to the input signal, compensating for the power amplifier's nonlinearity and enabling the amplifier to operate efficiently at higher power levels without increasing its size or complexity.
Solution Approach 2:
The predistortion filter performs preliminary signal processing by pre-compensating the input signal for the expected nonlinearity of the power amplifier. This preliminary action allows the power amplifier to operate in a more linear region, improving signal linearity without requiring the amplifier itself to be larger or more complex.
2Reliability
If a predistortion filter is added to compensate for power amplifier nonlinearity, then signal linearity is improved, but device complexity increases
Solution Approach 1:
The patent replaces complex hardware-based predistortion solutions with a digital signal processing implementation. The predistortion filter is implemented using digital algorithms that compute correction coefficients and apply them through software or firmware, reducing hardware complexity while maintaining signal linearity improvement.
Solution Approach 2:
The patent dynamically adjusts the predistortion filter coefficients based on operating conditions. By changing these parameters adaptively, the system maintains optimal signal linearity across different power levels and signal conditions without requiring a overly complex fixed-structure filter.
3Reliability
If conventional predistortion methods are used, then signal distortion is reduced, but computational complexity and resource consumption increase
Solution Approach 1:
The patent segments the predistortion computation into distinct stages: coefficient calculation, memory polynomial evaluation, and FIR filtering. This segmentation allows each stage to be optimized independently, reducing overall computational complexity and resource consumption while maintaining signal quality.
Solution Approach 2:
The patent uses lookup tables to store pre-computed memory polynomial coefficients and intermediate values. By copying these pre-calculated values during operation rather than recomputing them, the system significantly reduces real-time computational resource consumption while maintaining accurate predistortion.
Data Source
AI summary
An electronic device includes a nonlinear power amplifier, a predistortion coefficient calculator, and a memory polynomial predistortion filter coupled to the nonlinear power amplifier and to the predistortion coefficient calculator. The memory polynomial predistortion filter may include a plurality of finite impulse response (FIR) filter stages, and a summer coupled to the plurality of FIR filter stages. The FIR filter stages may functionally operate in parallel or may include a series of FIR filters coupled in parallel.