Memory Device Power Management via Word Line Bias

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Solution Overview

Problem

There is a need for electronic components, particularly memory devices, to consume less power to extend device usage between charges, reduce heat generation, and lower energy costs, especially in battery-powered devices and large data centers.

Innovation Solution

A nonvolatile memory device with dynamic mode operation management, allowing it to switch between lower-latency read/write mode and lower-power read mode based on usage patterns, using word line bias circuitry to adjust voltage levels and reduce leakage currents, thereby managing power consumption.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If memory devices operate in high-performance mode, then read/write speed is improved, but power consumption increases

Engineering Contradiction:
Improveread/write speedVSAvoidpower consumption
Core Design Contradiction:
SpeedVSUse of energy by moving object

Solution Approach 1:

The memory device dynamically switches between performance mode and power-saving mode based on operational requirements. The system adjusts operational parameters in real-time, transitioning memory controllers and memory devices between different power states to optimize the balance between speed and power consumption.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes operational parameters such as voltage levels and clock frequencies to manage power consumption. By adjusting these parameters based on workload demands, the system achieves high performance when needed while reducing power consumption during idle or low-demand periods.

Inventive Principle:
Principle #35Parameter changes

2Productivity

If memory devices operate continuously at high performance, then productivity is improved, but heat generation increases

Engineering Contradiction:
Improvedata processing throughputVSAvoidheat generation
Core Design Contradiction:
ProductivityVSTemperature

Solution Approach 1:

The system employs periodic power management where memory devices are activated only when needed for data operations. During idle periods, devices are placed in low-power states, creating a periodic pattern of high-performance operation followed by power-saving states, thereby reducing average heat generation while maintaining productivity.

Inventive Principle:
Principle #19Periodic action

3Use of energy by moving object

If memory devices use dynamic power management, then energy efficiency is improved, but device complexity increases

Engineering Contradiction:
Improveenergy efficiencyVSAvoidpower management complexity
Core Design Contradiction:
Use of energy by moving objectVSDevice complexity

Solution Approach 1:

The power management system operates autonomously, with memory controllers and devices self-managing their power states based on predefined policies and operational conditions. This self-service approach reduces the need for complex external power management circuitry while achieving effective energy efficiency.

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS11670343B2Apparatus and methods to provide power management for memory devices
Publication Date: 2023.06.06 OVONYX MEMORY TECHNOLOGY LLC
  • US11670343B2 patent drawing
  • US11670343B2 patent drawing
  • US11670343B2 patent drawing

AI summary

An apparatus, such as a nonvolatile solid-state memory device, may, in some implementations, include access line bias circuitry to set a bias level associated with a deselected access line(s) of a memory core in response to mode information. In one approach, access line bias circuitry may use linear down regulation to change a voltage level on deselected access lines of a memory core. A memory access device, such as a host processor, may be provided that is capable of dynamically setting a mode of operation of a memory core of a memory device in order to manage power consumption of the memory. Other apparatuses and methods are also provided.