Semiconductor Memory Power Cutoff for Leakage Reduction
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Solution Overview
Problem
Existing semiconductor memory devices face challenges in reducing power consumption and leakage current during standby mode without increasing the device area, as cutting off all peripheral circuits can lead to data loss and require larger transistors for faster switching, which increases area and power recovery time.
Innovation Solution
The solution involves selectively cutting off power supplies to the word line driver circuit and bit line precharge circuit, using a MOS transistor switching element with a larger channel width and gate oxide thickness, and maintaining the word line at a low impedance to prevent data loss, thereby reducing leakage current and maintaining performance without increasing the device area.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If all peripheral circuits are cut off from power supply to reduce power consumption, then power consumption is reduced, but the word line enters a floating state causing data loss
Solution Approach 1:
The patent segments the power supply cutoff by selectively cutting off power to specific peripheral circuits (word line driver circuit and bit line precharge circuit) while maintaining power to other circuits. This allows the word line to remain at a fixed potential level, preventing it from entering a floating state and ensuring data integrity is maintained during standby mode.
2Loss of time
If the channel width of the power supply cutoff switching element is increased to enhance driving ability and reduce impedance, then power supply recovery time is shortened, but the device area is increased
Solution Approach 1:
The patent applies local quality by designing the power supply cutoff switching element with specific local characteristics - using a transistor with optimized channel width that provides sufficient driving ability for the specific task of cutting off power to peripheral circuits, rather than using a uniformly large channel width throughout. This localized optimization reduces the overall device area while maintaining adequate performance.
3Loss of time
If the channel width of the transistor is increased to reduce impedance and enhance driving ability, then power supply recovery time is shortened, but the leakage current increases
Solution Approach 1:
The patent applies parameter changes by carefully selecting and optimizing the channel width parameter of the power supply cutoff switching element. The channel width is set to a specific value that provides sufficient driving ability for rapid power supply recovery while minimizing leakage current. This optimized parameter selection allows the transistor to switch quickly without creating excessive leakage paths during standby mode.
Data Source
AI summary
A semiconductor memory device includes a memory cell connected to a word line and a bit line, for storing and holding data, a word line driver circuit connected to the word line, a bit line precharge circuit connected to the bit line, and a peripheral control circuit. First power supply VDD is connected to the memory cell and the peripheral control circuit, and first power supply VDD is connected to word line driver circuit and bit line precharge circuit through switching element controlled by first control signal PD.