Semiconductor Memory Power-Down Detection Circuit
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Solution Overview
Problem
Conventional semiconductor memory devices face challenges in accurately detecting the power-down voltage level during testing, leading to potential circuit malfunctions and data errors due to high variability in detection ranges, which can cause incorrect power-down operations and reliability issues.
Innovation Solution
A semiconductor memory device is designed with a first detection circuit for constant voltage detection and a second high-accuracy detection circuit, with a selecting device that switches between them based on the testing state, ensuring precise power-down operations and reduced power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by stationary object
If a simple detection circuit is used for power-down detection, then power consumption is reduced, but detection accuracy deteriorates
Solution Approach 1:
The patent implements dynamic switching between two detection circuits based on the operational state. During testing operations, the high-accuracy detection circuit is activated to ensure precise power-down voltage detection. During normal operations, the low-power detection circuit is used to minimize power consumption. This dynamic adaptation resolves the contradiction by optimizing the detection circuit selection according to specific operational requirements.
Solution Approach 2:
The patent changes the detection circuit configuration parameter based on the operational mode. A selection circuit switches between a first detection circuit (high-accuracy) and a second detection circuit (low-power) depending on whether the device is in testing or normal operation. This parameter change allows the system to achieve both high accuracy and low power consumption at different times, resolving the inherent trade-off.
2Device complexity
If a simple detection circuit is used, then device complexity is reduced, but reliability deteriorates
Solution Approach 1:
The system dynamically selects the appropriate detection circuit based on operational context. During testing operations where reliability is critical, the high-accuracy detection circuit is activated. During normal operations, the simpler low-power circuit suffices. This dynamic approach ensures reliability when needed while maintaining simplicity during routine operation.
Solution Approach 2:
The detection circuit configuration parameter is changed based on operational mode through a selection circuit. The system switches between a first detection circuit with higher reliability for testing and a second detection circuit with lower complexity for normal operation. This parameter change resolves the contradiction by adapting the circuit configuration to operational requirements.
3Ease of manufacture
If detection range variability is high, then ease of manufacture is improved, but measurement precision deteriorates
Solution Approach 1:
The patent employs dynamic switching between detection circuits based on operational state. During testing operations where precise detection is critical, the high-accuracy circuit with narrow detection range is activated. During normal operations, the low-power circuit with broader detection range is used. This dynamic adaptation resolves the contradiction by matching the detection circuit characteristics to operational requirements.
Solution Approach 2:
The detection circuit parameter (accuracy vs. power consumption) is changed based on operational mode through a selection circuit. The system switches between a first detection circuit with high precision for testing and a second detection circuit with low power consumption for normal operation. This parameter change allows the system to achieve both manufacturing simplicity and detection precision at appropriate times.
Data Source
AI summary
A semiconductor memory device that can reduce power consumption and precisely perform a power-down operation while a testing operation is underway is provided. A flash memory of the invention has a low-power voltage-detection circuit, a high-precision voltage-detection circuit, and a controller. The low-power voltage-detection circuit detects the supply voltage falling to a constant voltage. The high-precision voltage-detection circuit detects the supply voltage falling to the constant voltage. The controller selects the high-precision voltage-detection circuit when the internal circuit is being tested, and it selects the low-power voltage-detection circuit when the internal circuit is not undergoing a test. The controller responds to the detection result from the low-power voltage-detection circuit or the high-precision voltage-detection circuit by performing a power-down operation.


