Nonvolatile Memory Power Noise Detection and Control Logic
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Solution Overview
Problem
Nonvolatile semiconductor memory devices face errors due to power noise, which are transient and distinct from physical defects, requiring separate error management to maintain reliability and data integrity.
Innovation Solution
A nonvolatile memory device with a power noise detection system that uses reference voltages to classify power noise levels and adjust operation conditions, allowing for transient error correction and management of memory blocks without permanent failure.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If power noise detection and classification system is implemented, then reliability is improved, but device complexity increases
Solution Approach 1:
The power noise detection system is segmented into multiple independent components: a power noise detection unit that monitors voltage sources, a classification unit that categorizes noise levels, and a control unit that manages operations. This segmentation allows the complex reliability function to be achieved through modular, manageable units rather than a monolithic complex system.
Solution Approach 2:
The system performs preliminary power noise detection and classification before executing memory operations. By detecting and classifying power noise in advance, the system can prevent erroneous operations and adjust parameters proactively, improving reliability without requiring complex real-time intervention mechanisms.
2Productivity
If power noise detection and operation adjustment is implemented, then productivity is improved, but loss of time increases
Solution Approach 1:
The control unit periodically monitors power noise levels and adjusts operation parameters accordingly. This periodic action allows the system to maintain high productivity by only interrupting operations when necessary, rather than continuously pausing for detection and adjustment, thus minimizing time loss while improving overall operation efficiency.
3Reliability
If transient error correction is implemented, then reliability is improved, but manufacturing precision requirements increase
Solution Approach 1:
The system corrects transient errors by dynamically changing operation parameters such as voltage levels and timing based on detected power noise characteristics. This approach improves reliability by adapting to transient conditions without requiring higher manufacturing precision, as the corrections are applied through software-controlled parameter adjustments rather than hardware precision improvements.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The system effectively detects and manages power noise-induced errors, ensuring data retention and reliability by distinguishing between power noise and physical defects, enabling the reuse of memory blocks after error correction.
Implementation Method 1
The control logic detects a first power noise by comparing one of voltage sources to be provided to the memory cell array with a first reference voltage and detects a second power noise by comparing the one of the voltage sources with each of the first reference voltage and a second reference voltage
Data Source
AI summary
A nonvolatile memory device includes a memory cell array that stores data, and control logic. The control logic is configured to control a read operation, a program operation, or an erase operation on the data. The control logic is configured to detect a first power noise based on one of voltage sources to be provided to the memory cell array and a first reference voltage and detect a second power noise based on the one voltage source of the voltage sources and each of the first reference voltage and a second reference voltage. The control logic is configured to determine whether to perform at least one of an operation period of the read operation, an operation period of the program operation, or an operation period of the erase operation, based on whether at least one of the first and second power noises is detected.


