Memory Power-On Initialization Voltage Synchronization
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Solution Overview
Problem
Conventional power-on initialization techniques for semiconductor memory devices with multiple supply voltages fail to efficiently manage power consumption and user intervention during the power-on phase, as they do not account for the simultaneous reaching of threshold voltages by all supply lines, leading to excessive current consumption and limited user control.
Innovation Solution
A power-on initialization device that includes voltage detectors for core and I/O supply voltages, an AND_logic circuit to synchronize the power-on sequence, and a pull-up/pull-down mechanism to manage signal levels, ensuring that all supply voltages reach their minimum values before initiating the power-on phase, thereby reducing power consumption and enabling user control.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If conventional power-on initialization techniques are used for semiconductor memory devices with multiple supply voltages, then the device can be powered on, but excessive current consumption occurs because all supply voltages do not reach threshold levels simultaneously
Solution Approach 1:
The patent applies preliminary action by implementing voltage detection before initiating the power-on sequence. The controller detects whether all supply voltages have reached their respective threshold levels before allowing the memory device to power on, preventing premature operation that would cause excessive current consumption.
Solution Approach 2:
The patent implements feedback by continuously monitoring the status of multiple supply voltages and using this information to control the power-on sequence. The controller receives feedback signals indicating whether each supply voltage has reached its threshold, and adjusts the power-on initialization accordingly to ensure reliable operation.
2Ease of operation
If conventional power-on initialization techniques are used, then the device operates automatically, but user intervention capability is limited or nonexistent during the power-on phase
Solution Approach 1:
The patent applies dynamics by making the power-on sequence controllable and adjustable based on user input. The controller can respond to user commands to modify the power-on initialization process, allowing flexible operation modes where users can intervene to start or modify the power-on sequence based on system conditions or user preferences.
Data Source
AI summary
The apparatus described herein may comprise a first set of transistors, including a first transistor and a second transistor, and a second set of transistors, including a third transistor and a fourth transistor. Gates of the first and second transistors may be coupled to a first signal and a second signal, respectively, each indicating whether a corresponding one of a first supply voltage and a second supply voltage reaches a first threshold voltage or a second threshold voltage to power on a first circuit or a second circuit of a memory device. Gates of the third and fourth transistors may be coupled to a first inverted version of the first signal and a second inverted version of the second signal, respectively. An outcome signal of the second set of transistors may indicate a power-on state of the memory device responsive to power states of the first and second signals.