Memory System Power-Off Recovery With Reduced Read-Retry Levels

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Solution Overview

Problem

Existing power-off recovery processes for non-volatile memory devices, such as SSDs, result in extended power-on times due to extensive evaluation and recovery steps, degrading system performance and increasing power consumption.

Innovation Solution

Implementing a reduced number of read-retry levels in the power-off recovery (POR) procedure, including specific read-retry operations based on error correction code (ECC) verification and data re-storage procedures, to streamline the recovery process.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If extensive evaluation and recovery steps are performed during power-off recovery, then data integrity is ensured, but power-on time is extended

Engineering Contradiction:
Improvedata integrityVSAvoidpower-on time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent applies partial action by performing only the necessary evaluation and recovery steps during power-off recovery. Instead of executing all standard recovery procedures, the system selectively performs only those steps required to ensure data integrity, thereby reducing power-on time while maintaining reliability

Inventive Principle:
Principle #16Partial or excessive action

Solution Approach 2:

The patent implements preliminary action by maintaining a snapshot of a checkpoint that includes previously evaluated data. This pre-prepared snapshot allows the system to skip redundant evaluation steps during power recovery, ensuring data integrity is restored quickly without performing extensive re-evaluation

Inventive Principle:
Principle #10Preliminary action

2Reliability

If multiple read-retry levels are performed during POR procedure, then read error handling is improved, but power consumption increases

Engineering Contradiction:
Improveread error handlingVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent applies partial action by limiting the number of read-retry levels performed during the POR procedure. Instead of executing all standard read-retry levels, the system performs only a reduced number of retry operations at selected levels, thereby reducing power consumption while still effectively handling read errors

Inventive Principle:
Principle #16Partial or excessive action

Solution Approach 2:

The patent implements parameter changes by dynamically adjusting the read-retry levels based on the specific error conditions detected during POR. Rather than using fixed retry parameters, the system modifies the retry levels and number of attempts according to the actual error state, optimizing the balance between reliability and power consumption

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS20250321828A1Apparatus, system, and method for operating memory system
Publication Date: 2025.10.16 YANGTZE MEMORY TECH CO LTD
  • US20250321828A1 patent drawing
  • US20250321828A1 patent drawing
  • US20250321828A1 patent drawing

AI summary

A memory system includes a memory device and a memory controller. The memory controller is configured to control the memory device to perform a first read operation, control the memory device to perform one or more first read-retry operations based on first read-retry levels when a first read error occurs during the first read operation, initiate a power-off recovery (POR) procedure after a power-off of the memory system occurs, control the memory device to perform a second read operation during the POR procedure, and control the memory device to perform one or more second read-retry operations based on second read-retry levels when a second read error occurs during the second read operation. Each read-retry level of the second read-retry levels is included in a corresponding subset of the first read-retry levels.