Memory Module Power Control via Selective Switching

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Solution Overview

Problem

Data processing systems consume excessive power due to the simultaneous powering of all memory boards, leading to inefficiencies and increased energy costs.

Innovation Solution

A data processing system with a controller and selection component that selectively powers memory modules based on usage, remapping logical addresses to physical addresses and using switches to enable or disable power to specific modules, allowing for the powering down of idle or underutilized modules.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If all memory modules are powered on simultaneously, then system reliability and performance are ensured, but power consumption increases significantly

Engineering Contradiction:
Improvesystem reliabilityVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent segments the memory modules into multiple groups and uses switches to selectively power on only the segments needed for current operations. This allows the system to maintain reliability for active memory access while reducing overall power consumption by leaving inactive segments powered off.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent implements dynamic power management where the power supply state of memory modules is changed from static (all on or all off) to dynamic based on actual usage patterns. The controller monitors memory access patterns and adjusts power supply accordingly, transitioning between powered-on and powered-off states as needed.

Inventive Principle:
Principle #15Dynamics

2Use of energy by moving object

If selective powering of memory modules is implemented, then power consumption is reduced, but address mapping complexity increases

Engineering Contradiction:
Improvepower consumptionVSAvoidaddress mapping complexity
Core Design Contradiction:
Use of energy by moving objectVSDevice complexity

Solution Approach 1:

The patent introduces an intermediary address translation mechanism between logical addresses and physical addresses. This intermediary layer manages the complexity of address mapping by translating requests to appropriate physical locations, abstracting the complexity from the memory access interface while enabling selective powering.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The controller monitors memory access patterns and uses this feedback to determine which memory modules should be powered on. This feedback mechanism allows the system to adaptively manage power consumption while maintaining simple address mapping through intelligent decision-making based on actual usage patterns.

Inventive Principle:
Principle #23Feedback

3Loss of energy

If memory modules are powered down to save energy, then energy efficiency improves, but access speed and availability may be affected

Engineering Contradiction:
Improveenergy efficiencyVSAvoidaccess speed
Core Design Contradiction:
Loss of energyVSSpeed

Solution Approach 1:

The patent applies preliminary action by pre-loading frequently accessed data into powered-on memory modules before actual access is needed. This allows the system to maintain fast access speeds for critical data while keeping less frequently accessed data in powered-off modules, thus balancing energy efficiency with access performance.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The system implements periodic monitoring and evaluation of memory access patterns to determine optimal power states. This periodic action allows the system to dynamically adjust power supply timing, ensuring memory modules are powered on just in time for needed access while maximizing energy savings during idle periods.

Inventive Principle:
Principle #19Periodic action

Data Source

PatentUS11776614B2Memory system, data processing system and method of operating the same
Publication Date: 2023.10.03 SK HYNIX INC
  • US11776614B2 patent drawing
  • US11776614B2 patent drawing
  • US11776614B2 patent drawing

AI summary

A data processing system may include a plurality of memory modules, a controller, a power supply and a plurality of switches. Each of the memory modules may include a plurality of pages. The controller may control operations of the memory modules. The power supply may provide the memory modules with a power. The switches may be arranged corresponding to each of the memory modules. The switches may be selectively driven in response to a switch drive signal from the controller.