Memory Power-State Pattern Control for Low-Latency Energy Savings

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Solution Overview

Problem

Existing memory systems face challenges in balancing power consumption with data performance and latency, as they often operate in inefficient power states due to frequent power state change requests from host systems.

Innovation Solution

A memory system that activates a reduced power consumption mode based on patterns of power state change requests, overriding the default operation mode to optimize power usage by adjusting parameters such as active lanes, data speed, and logging, while monitoring and adapting to the host system's workload.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If the memory system frequently changes power states in response to host requests, then data performance and responsiveness are improved, but power consumption increases

Engineering Contradiction:
Improvedata performanceVSAvoidpower consumption
Core Design Contradiction:
SpeedVSUse of energy by moving object

Solution Approach 1:

The memory system dynamically adjusts its power state based on the pattern of host requests. Instead of statically responding to each request, the system monitors request patterns over time and adaptively transitions between power states, optimizing the balance between performance and power consumption based on actual workload characteristics

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The system changes operational parameters by transitioning between different power states (e.g., active, idle, sleep modes) based on detected request patterns. This parameter adjustment allows the system to optimize power consumption while maintaining adequate performance by selecting appropriate power states matching the workload intensity

Inventive Principle:
Principle #35Parameter changes

2Use of energy by moving object

If the memory system enters low power mode frequently, then power consumption is reduced, but data latency increases

Engineering Contradiction:
Improvepower consumptionVSAvoiddata latency
Core Design Contradiction:
Use of energy by moving objectVSLoss of time

Solution Approach 1:

The system performs preliminary monitoring of host request patterns before making power state decisions. By detecting patterns in advance and predicting future requests, the system can proactively maintain optimal power states that prevent excessive latency while still achieving power savings, rather than reactively switching states after requests occur

Inventive Principle:
Principle #10Preliminary action

3Use of energy by moving object

If the memory system monitors and analyzes power state change requests, then power consumption optimization is improved, but device complexity increases

Engineering Contradiction:
Improvepower consumption optimizationVSAvoidsystem complexity
Core Design Contradiction:
Use of energy by moving objectVSDevice complexity

Solution Approach 1:

The system implements feedback by monitoring host requests and using this information to adjust power states. The monitoring mechanism provides continuous feedback about workload patterns, which the system uses to dynamically optimize power consumption without requiring complex external control systems

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The memory system performs self-service by autonomously monitoring its own operational patterns and making independent decisions about power state transitions. This self-monitoring and self-adjustment capability reduces the need for external power management hardware or complex control systems, thereby limiting the increase in device complexity

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS12449887B2Activation of memory power consumption mode based on pattern of power state change requests
Publication Date: 2025.10.21 MICRON TECHNOLOGY INC
  • US12449887B2 patent drawing
  • US12449887B2 patent drawing
  • US12449887B2 patent drawing

AI summary

Various embodiments described herein provide for a method for reduced power consumption by a memory system. A memory system of some embodiments monitors power state change requests received by the memory system from a host system, and determines a pattern of power state change requests received from the host system. Based on the determined pattern, the memory system can decide to activate or deactivate a reduced power consumption mode on the memory system. A reduced power consumption mode can comprise a first set of operation parameters that cause a memory system to operate with lower power consumption than a second set of operation parameters associated with a current operation mode, where the current operation mode is associated with a current power state set or last requested by the host system.