Memory Power Sequencing for Transient Low-Voltage Recovery

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Solution Overview

Problem

Conventional memory sub-systems face issues with transient power supply events, such as transient low voltage, which can cause power rails to drop below operational thresholds, leading to partial integrated circuit restarts and violations of power bring-up/bring-down requirements, making components inoperable and requiring manual intervention for recovery.

Innovation Solution

Incorporation of voltage threshold detection and timing circuitry that monitors primary supply voltage and asserts/deasserts timer enable signals to control sequencing circuitry, ensuring power bring-up/down requirements are met, even during transient events, by maintaining the primary enable signal in a deasserted state for a recovery time period to allow safe power-down and residual voltage drainage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If conventional memory sub-systems operate under variable quality input power, then the system can handle indeterminate power supply conditions, but transient low voltage events cause power rails to drop below operational thresholds leading to partial integrated circuit restarts and violations of power bring-up/bring-down requirements

Engineering Contradiction:

Improveability to handle variable power supply qualityVSAvoidpower sequence requirement compliance

Core Design Contradiction:

Adaptability or versatilityVSReliability

Solution Approach 1:

The timing circuitry deasserts the primary enable signal in advance for a predetermined recovery time period before allowing power sequencing to proceed. This preliminary action prevents transient low voltage events from causing improper power cycling by ensuring sufficient time has passed since the last voltage threshold violation, thereby maintaining reliability while adapting to variable power conditions

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The timing circuitry acts as an intermediary between the voltage detection circuitry and the sequencing circuitry. It receives voltage threshold violation signals and translates them into appropriate enable signal timing control, mediating the interaction between power monitoring and power sequencing functions to ensure compliant operation under variable power conditions

Inventive Principle:

Principle #24Intermediary (Mediator)

2Ease of operation

If traditional sequencer circuits are used to control power supply sequencing, then the system can manage power delivery order, but they are limited in ability to withstand fast transient power supply events without violating power bring-up/bring-down requirements

Engineering Contradiction:

Improvepower sequencing controlVSAvoidtransient event resistance

Core Design Contradiction:

Ease of operationVSReliability

Solution Approach 1:

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The system implements a recovery time period that acts as a cushion against transient power events. By requiring a minimum time interval between voltage threshold violations before allowing power sequencing to proceed, the system creates a protective buffer that prevents transient events from disrupting power bring-up/bring-down sequences

Inventive Principle:

Principle #11Beforehand cushioning (Prior cushioning)

3Adaptability or versatility

If power rails are allowed to drop during transient events, then the system can respond to variable power conditions, but this causes partial integrated circuit restarts and makes components inoperable requiring manual intervention

Engineering Contradiction:

Improveresponse to power variationsVSAvoidmanual intervention requirement

Core Design Contradiction:

Adaptability or versatilityVSEase of repair

Solution Approach 1:

The timing circuitry automatically deasserts the primary enable signal for a predetermined recovery time period when voltage threshold violations are detected, enabling the system to self-correct from transient low voltage events without requiring manual intervention. This self-service mechanism restores normal operation by preventing improper power cycling and allowing residual voltage to drain safely

Inventive Principle:

Principle #25Self-service

Data Source

PatentUS11353942B2Power delivery timing for memory

Publication Date: 2022.06.07 MICRON TECHNOLOGY INC

AI summary

A system can comprise a memory device and sequencing circuitry configured to provide enable signals to a number of voltage regulators in association with providing sequenced power signals to the memory device. The system can include voltage threshold detection circuitry configured to: detect primary supply voltage events; and responsive to detecting a primary supply voltage event, deassert a timer enable signal provided to timing circuitry. The timing circuitry is configured to, responsive to the deassertion of the timer enable signal: deassert a primary enable signal provided to the sequencing circuitry; and maintain the primary enable signal in a deasserted state for a particular amount of time prior to reasserting the primary enable signal.