Semiconductor Memory Power Wiring for MRAM Noise Isolation
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current semiconductor memory devices face challenges in operating magnetic random access memory (MRAM) with specifications similar to volatile memories like DRAM and SRAM, which hinders cost-effective replacement and efficient data reading due to noise interference between banks during read operations.
Innovation Solution
The semiconductor memory device design includes a configuration where power source wiring for each bank is connected in the vicinity of a power source pad, allowing noise absorption and minimizing interference between banks, enabling independent operation and improved data reading accuracy.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If power source wiring for multiple banks is shared or closely coupled, then device complexity is reduced, but noise interference between banks increases during read operations
Solution Approach 1:
The patent divides the power source wiring into separate, independent wiring paths for each bank. The first power source wiring is connected to the first bank and the second power source wiring is connected to the second bank, creating segmented power delivery paths that prevent noise coupling between banks while maintaining operational independence.
Solution Approach 2:
The patent introduces an intermediary structure (separate power source wiring paths) between the power source pad and each bank to isolate noise. By routing power through distinct wiring paths rather than sharing common paths, the design acts as a mediator that delivers power while preventing noise transmission between banks.
2Reliability
If banks are operated independently with separate power source wiring, then noise interference is reduced, but device complexity and wiring area increase
Solution Approach 1:
The patent applies local quality by providing each bank with its own dedicated power source wiring path tailored to its specific needs. The first power source wiring is optimized for the first bank and the second power source wiring is optimized for the second bank, allowing each bank to operate with independent power delivery characteristics that minimize noise while maintaining reliability.
3Adaptability or versatility
If MRAM is operated with specifications similar to DRAM and SRAM, then replacement cost is reduced, but noise interference from adjacent banks increases during read operations
Solution Approach 1:
The patent segments the power delivery system into independent paths for each bank, allowing MRAM banks to operate with standardized interfaces similar to DRAM and SRAM while internally preventing noise interference through separate wiring paths. This enables compatibility with existing memory systems while solving the noise problem inherent in multi bank configurations.
Data Source
AI summary
A semiconductor memory device includes a power source pad, a first bank including a plurality of memory cells, a second bank including a plurality of memory cells, the first bank being sandwiched between the power source pad and the second bank, first power supply lines connected to the power source pad and supplying power to the first bank and not to the second bank, and second power supply lines connected to the power source pad, passing over the first bank, and supplying power to the second bank and not to the first bank.