Memory Pre-Charge Voltage Control for Program Disturb Reduction
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Solution Overview
Problem
Program disturb occurs during the pre-charge phase of memory devices, particularly due to source-side injection (SSI) type of program disturb, which affects the reliability and efficiency of data storage in NAND strings.
Innovation Solution
Adjusting pre-charge voltages on word lines and source-side word lines based on risk factors such as temperature, position, and program voltage to reduce the electric field and channel gradient, thereby minimizing the injection type of program disturb. This involves setting lower pre-charge voltages when the risk is higher and using elevated voltages for specific subsets of source-side word lines to reduce the channel gradient and duration of electron-hole pair generation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional pre-charge voltages are applied during program operation, then the memory device can maintain basic operation functionality, but injection type program disturb occurs affecting reliability and data integrity
Solution Approach 1:
The patent applies different pre-charge voltages to different word line groups based on their position and risk factors. Source-side word lines receive elevated pre-charge voltages while drain-side word lines receive reduced pre-charge voltages, creating localized voltage conditions that minimize electron injection into charge trapping layers and reduce program disturb effects
Solution Approach 2:
The patent dynamically adjusts pre-charge voltage parameters based on multiple risk factors including temperature, word line position, and program voltage levels. The system modifies voltage parameters in real-time to optimize the balance between maintaining operational functionality and preventing program disturb, thereby improving data integrity
2Reliability
If elevated pre-charge voltages are applied to source-side word lines, then the channel gradient and electron-hole pair generation duration are reduced, but the device complexity increases due to multiple voltage levels
Solution Approach 1:
The patent segments word lines into different groups (source-side and drain-side) and applies distinct voltage control strategies to each segment. This segmentation allows optimized voltage application to specific regions while managing overall system complexity through structured control architecture
Solution Approach 2:
The patent implements dynamic voltage adjustment where pre-charge voltages are modified based on real-time risk factor assessment. The system transitions between different voltage states (elevated for source-side, reduced for drain-side) to optimize write performance while managing complexity through conditional control logic
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The proposed solution effectively reduces the occurrence of program disturb, enhancing the write performance and data integrity by minimizing electron injection into the charge trapping layer, thus improving the overall reliability of memory devices.
Implementation Method 1
Adjusting pre-charge voltages on word lines and source-side word lines based on risk factors such as temperature, position, and program voltage to reduce the electric field and channel gradient
Data Source
AI summary
Techniques are described for reducing an injection type of program disturb in a memory device during the pre-charge phase of a program loop. In one approach, a pre-charge voltage on the selected word line and drain side word lines is adjusted based on a risk of the injection type of program disturb. Risk factors such as temperature, WLn position, Vpgm and the selected sub-block, can be used to set the pre-charge voltage to be lower when the risk is higher. In another approach, the pre-charge voltage on the source side word lines is adjusted to reduce a channel gradient and/or the amount of time in which the injection type of program disturb occurs.


