Memory System Pre-fetching Pattern Detection

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Solution Overview

Problem

Existing memory systems face inefficiencies in pre-fetching techniques due to the resetting of pattern detection processes by write-alike commands and the repeated pre-fetching and flushing of data caused by a high ratio of hibernate commands, leading to reduced performance and increased latency.

Innovation Solution

The memory system stores sequential read command data and maintains pattern detection even after receiving write-alike commands, allowing it to determine if subsequent read commands continue a sequential pattern. Additionally, it tracks the ratio of hibernate commands to other commands and refrains from pre-fetching if the ratio exceeds a threshold, thereby mitigating redundant pre-fetching procedures.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If pattern detection is reset by write-alike commands, then the memory system can respond to diverse command types, but sequential pattern detection accuracy deteriorates

Engineering Contradiction:
Improvecommand type recognitionVSAvoidsequential pattern detection accuracy
Core Design Contradiction:
Adaptability or versatilityVSMeasurement precision

Solution Approach 1:

The command stream is segmented into read command sequences and write-alike commands. The pattern detection mechanism is applied specifically to read command sequences, while write-alike commands are handled separately without triggering pattern detection reset, thus maintaining segmentation between pattern analysis and general command processing

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different quality requirements are applied to different command types: read commands undergo strict sequential pattern detection with continuous monitoring, while write-alike commands receive localized handling that does not interfere with the pattern detection state, allowing each command type to be processed with appropriate scrutiny

Inventive Principle:
Principle #3Local quality

2Speed

If pre-fetching is performed frequently to reduce latency, then read access speed improves, but processing overhead increases due to redundant pre-fetching from hibernate commands

Engineering Contradiction:
Improveread access speedVSAvoidprocessing overhead
Core Design Contradiction:
SpeedVSDevice complexity

Solution Approach 1:

The system implements feedback through hibernate command tracking that monitors the ratio of hibernate commands to total commands. When this ratio exceeds a threshold, the system adjusts pre-fetching behavior accordingly, creating a feedback loop that prevents redundant pre-fetching operations while maintaining efficient read access speed

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The pre-fetching strategy is made dynamic by adjusting its activation based on the hibernate command ratio. The system transitions between aggressive pre-fetching (when hibernate ratio is low) and conservative pre-fetching (when hibernate ratio is high), allowing optimal performance adaptation to varying workload characteristics

Inventive Principle:
Principle #15Dynamics

3Measurement precision

If pattern detection continues after write-alike commands, then sequential pattern detection accuracy improves, but system complexity increases

Engineering Contradiction:
Improvesequential pattern detection accuracyVSAvoidpattern detection maintenance complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The pattern detection logic is extracted from the general command processing flow and implemented as a separate, dedicated mechanism that continuously monitors read commands independently of write-alike command handling. This extraction allows pattern detection to maintain its state without being interfered with by other command types, reducing the complexity of coordinating multiple processing streams

Inventive Principle:
Principle #2Taking out (Extraction)

Data Source

PatentUS20250053515A1Techniques for pre-fetching information using pattern detection
Publication Date: 2025.02.13 MICRON TECHNOLOGY INC
  • US20250053515A1 patent drawing
  • US20250053515A1 patent drawing
  • US20250053515A1 patent drawing

AI summary

Methods, systems, and devices supporting techniques for pre-fetching information using pattern detection are described. Some memory systems may support pre-fetching information, such as logical-to-physical (L2P) mapping tables, data, or both, if a sequential pattern of read commands is detected. In some examples, the memory system may store a list of logical addresses indicated by received read commands and may determine whether the list corresponds to a sequential pattern independent of intervening write-alike commands. The list may store previous logical addresses for read commands, allowing the memory system to determine whether subsequent read commands form a sequential pattern. Additionally or alternatively, the memory system may track a ratio of hibernate commands to other commands (e.g., sequential read commands) and may refrain from pre-fetching L2P mapping tables for a detected sequence if the tracked ratio satisfies (e.g., exceeds) a threshold ratio.