Memory Device Precharge Control Circuit for Program Performance
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current memory devices face inefficiencies in program performance due to limitations in voltage control during precharge operations, which affect the boosting efficiency of non-selection cell strings and overall data programming speed.
Innovation Solution
The implementation of a memory device with a precharge control circuit that manages voltage levels across word lines, applying a turn-on voltage to selection and adjacent word lines during precharge operations to enhance the boosting efficiency of non-selection cell strings, thereby improving program performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If voltage control during precharge operations is maintained at conventional levels, then device complexity is reduced, but program performance and boosting efficiency of non-selection cell strings deteriorate
Solution Approach 1:
The patent segments the word lines into different groups (selection word lines and non-selection word lines) and applies different voltage levels to each group during precharge operations. This segmentation allows optimized voltage control for different functional regions, improving program performance without requiring complex global voltage control mechanisms.
Solution Approach 2:
The patent implements local quality by applying turn-on voltages specifically to non-selection word lines that are adjacent to selection word lines, while maintaining different voltage levels on other word lines. This localized voltage optimization enhances boosting efficiency in critical regions without unnecessarily complicating the overall voltage control system.
2Productivity
If turn-on voltage is applied to all word lines during precharge, then boosting efficiency of non-selection cell strings is improved, but energy consumption increases
Solution Approach 1:
The patent applies turn-on voltages selectively only to non-selection word lines that are adjacent to selection word lines during precharge operations, rather than applying voltages to all word lines uniformly. This localized approach provides the necessary boosting efficiency for non-selection cell strings while minimizing energy consumption by avoiding unnecessary voltage application to other regions.
Solution Approach 2:
The patent implements partial action by applying turn-on voltages to only the specific subset of word lines that require boosting (non-selection word lines adjacent to selection word lines), rather than applying voltages to all word lines. This partial application of voltage achieves the required boosting efficiency while reducing overall energy consumption.
3Productivity
If precharge operation is performed on all cell strings, then program performance is improved, but operational latency increases
Solution Approach 1:
The patent performs precharge operations selectively on only those cell strings connected to non-selection word lines that are adjacent to selection word lines, rather than performing precharge on all cell strings uniformly. This localized precharge approach improves program performance for the critical cell strings while reducing operational latency by avoiding unnecessary precharge operations on other cell strings.
Solution Approach 2:
The patent segments the cell strings into different groups based on their associated word lines, and performs precharge operations only on the specific segment that requires it (cell strings connected to non-selection word lines adjacent to selection word lines). This segmentation enables optimized precharge timing that improves program performance while minimizing operational latency.
Data Source
AI summary
A method of operating a memory device includes performing a first program operation on memory cells connected to a first word line among a plurality of word lines, performing the first program operation on memory cells connected to a second word line among the plurality of word lines, applying a turn-on voltage at a first level to the first and second word lines, applying a voltage at a level lower than the first level to a third word line among the plurality of word lines, performing a precharge operation on partial cell strings among a plurality of cell strings, and performing a second program operation on the memory cells connected to the first word line.


