Memory Device Pre-Charging Circuit for Fast Read Speed

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Solution Overview

Problem

Conventional memory devices have slow read operations due to the need for pre-charging and sensing voltage differences between complementary data lines, which limits their speed and efficiency.

Innovation Solution

Incorporating a cross-coupled circuit that pre-charges data lines to a high voltage level and uses a high speed voltage node to quickly sense voltage differences, allowing for faster data reading by pulling one line to a low voltage level and the other to a high speed voltage level, enabling rapid detection of bit values.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If conventional pre-charging and sensing method is used, then the memory device can perform read operations, but the read operation speed is slow

Engineering Contradiction:
Improveread operation speedVSAvoidtime for pre-charging and sensing
Core Design Contradiction:
SpeedVSLoss of time

Solution Approach 1:

The patent applies preliminary action by pre-charging the first and second lines to a high voltage level before the read operation begins. This preparatory step ensures that the lines are ready for rapid sensing, reducing the time required during the actual read operation. The pre-charging circuit charges the lines in advance, so when the read operation is initiated, the sensing can occur more quickly without waiting for voltage buildup.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent utilizes parameter changes by dynamically adjusting voltage levels during the read operation. After pre-charging to a high voltage level, the system transitions to sensing voltage differences that pull lines toward low voltage levels. The sensing circuit detects these voltage parameter changes to determine stored bits, enabling faster read operations through controlled voltage transitions rather than relying solely on gradual charging.

Inventive Principle:
Principle #35Parameter changes

2Ease of operation

If voltage levels are kept at high level continuously, then the lines are ready for sensing, but energy consumption increases

Engineering Contradiction:
Improvereadiness for sensing operationVSAvoidenergy consumption of pre-charging circuit
Core Design Contradiction:
Ease of operationVSUse of energy by moving object

Solution Approach 1:

The patent implements periodic action by charging the first and second lines to a high voltage level only when needed for read operations, rather than maintaining high voltage continuously. The pre-charging circuit operates periodically to recharge the lines after they have discharged during sensing operations. This periodic charging approach maintains operational readiness while significantly reducing overall energy consumption compared to continuous high-voltage maintenance.

Inventive Principle:
Principle #19Periodic action

Data Source

PatentUS11217301B2High speed memory device implementing a plurality of supply voltages
Publication Date: 2022.01.04 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US11217301B2 patent drawing
  • US11217301B2 patent drawing
  • US11217301B2 patent drawing

AI summary

Embodiments herein include a first line, wherein the first line is complementary to a second line; a voltage generator configured to generate a first supply voltage, a second supply voltage and a third supply voltage, the third supply voltage is lower than the second supply voltage, the voltage generator further comprises a transistor structure with a plurality of transistors electrically connected in parallel from the first supply voltage to a supply output node that provides the second supply voltage; a memory cell electrically coupled to the first and second lines, the memory cell further comprises two cross-coupled transistor strings connected from the first supply voltage to a ground voltage; a pre-charger with a first pre-charger transistor cross-coupled to a second pre-charger transistor, the pre-charger is configured to pre-charge the first and second lines to a level of a source voltage.