Memory Device Precharge Control for Lower-Current Program Verification
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Solution Overview
Problem
Existing memory devices face inefficiencies in program operations due to high current consumption and prolonged execution times during program verification processes, particularly when discharging bit line voltages to ground and applying verification precharge voltages.
Innovation Solution
The implementation of a first precharge method that discharges program-inhibited bit line voltages to a verification precharge voltage instead of ground, and a second precharge method that determines program completion based on threshold voltage verification, reducing current consumption and peak current.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If program-inhibited bit line voltage is discharged to ground during program verification, then verification accuracy is improved, but current consumption increases and peak current is generated
Solution Approach 1:
The patent introduces an intermediary voltage level (verification precharge voltage) between ground and the program-inhibited bit line voltage. Instead of directly discharging to ground, the voltage is first discharged to the verification precharge voltage level, which reduces the discharge current and peak current while still enabling accurate verification. This intermediary step acts as a current-limiting mechanism that maintains verification accuracy without the harmful current spikes.
2Measurement precision
If program-inhibited bit line voltage is discharged to ground during program verification, then verification accuracy is improved, but program operation time is prolonged
Solution Approach 1:
The patent dynamically adjusts the discharge destination voltage based on the verification requirements. Rather than using a fixed ground discharge, the system discharges to a dynamically determined verification precharge voltage level that is sufficient for accurate verification but reduces the discharge time constant. This dynamic approach optimizes both accuracy and speed by avoiding unnecessary discharge to full ground potential.
3Reliability
If conventional precharge method is used during program verification, then verification can be performed, but peak current is generated and current consumption is high
Solution Approach 1:
The patent changes the voltage parameter of the precharge operation from the conventional ground reference to a verification precharge voltage level. This parameter change transforms the harmful peak current discharge into a controlled voltage transition that maintains verification capability while eliminating the harmful current spikes. The verification precharge voltage serves as an optimized parameter that balances reliability and harm reduction.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances program operation performance by reducing current consumption and suppressing peak current, thereby accelerating the program verification process and improving overall efficiency.
Implementation Method 1
The row decoder may be configured to form a channel in a string coupled between the program-inhibited bit line and a source line. The program-inhibited voltage of the program-inhibited bit line may be discharged through the channel to the verification precharge voltage.
Data Source
AI summary
A memory device includes a bit line control circuit and a row decoder. The bit line control circuit applies a verification precharge voltage after a program pulse period to a program-inhibited bit line maintaining a program-inhibited voltage during the program pulse period. The row decoder forms a channel in a string coupled between the program-inhibited bit line and a source line. The program-inhibited voltage of the program-inhibited bit line is discharged through the channel to the verification precharge voltage.