Memory Device Precharging Circuit for Efficient Write Current Flow
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Solution Overview
Problem
Existing memory devices using variable resistance elements face challenges in improving operating characteristics, particularly in write operations due to inefficiencies in current and voltage management.
Innovation Solution
The memory device incorporates a precharging circuit that charges signal lines via switches, activating memory cells based on voltage differences, allowing a write current to flow through the memory cell, enhancing write operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If conventional write operations are used in memory devices with variable resistance elements, then the basic write function is achieved, but the operating characteristics and write efficiency are insufficient
Solution Approach 1:
The precharging circuit performs preliminary charging of the first signal line and first wiring before the write operation is actually executed. This preliminary action stores energy in advance, enabling faster and more efficient write operations when needed, thus improving write operation efficiency while maintaining reliable operating characteristics.
Solution Approach 2:
The invention dynamically controls the switching elements (first switch and second switch) to connect and disconnect the precharging circuit from the signal lines and wirings at appropriate times. This dynamic switching enables the system to adapt between precharging mode and write operation mode, optimizing performance for different operational phases while ensuring reliable operation.
2Productivity
If precharging circuit is added to charge signal lines and wirings, then write operation efficiency is improved, but device complexity increases
Solution Approach 1:
The precharging circuit is designed to serve multiple functions: it precharges the first signal line, precharges the first wiring, and works in conjunction with the switching elements to enable the actual write operation. This multi-functionality justifies the added complexity by providing several critical operations within a single integrated circuit block.
Solution Approach 2:
The patent implements a hierarchical nested structure where precharging circuits are nested within the memory device architecture, and switching elements are nested to control access between different circuit components. This nested organization manages complexity by creating modular, hierarchical control structures that are easier to design and manufacture.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration improves the efficiency and effectiveness of write operations by optimizing current flow and voltage management, thereby enhancing the overall performance of the memory device.
Implementation Method 1
the first precharging circuit charges the first signal line and the first wiring which are connected via the first switch in an on state
Implementation Method 2
the memory cell is activated according to a voltage difference between the first signal line and the second signal line
Data Source
AI summary
A memory device includes a memory cell connected between first and second signal lines, a first wiring connected to the first signal line, a second wiring connected to the second signal line, and a precharging circuit connected to the first wiring. During a write sequence, the precharging circuit charges the first signal line and the first wiring, the memory cell is activated according to a voltage difference between the first signal line and the second signal line, and a write current generated from parasitic capacitances of both the charged first signal line and the charged first wiring flows from the first wiring to the second wiring via the activated memory cell.