Hierarchical Memory Prefetching via Read Hit Ratio Feedback

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Solution Overview

Problem

As computing devices and memory storage capacities increase, there is a need for an efficient operation policy to manage data storage between processing devices and memory, particularly to reduce access time and frequency to slower storage devices by utilizing a hierarchical memory structure.

Innovation Solution

A data storage device configuration with a first memory device, a second memory device having a fetch region and a prefetch region divided into sections, and a controller that manages data eviction and prefetching based on read hit ratios to optimize data access and caching.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If data is stored in slower storage devices to increase storage capacity, then storage capacity is improved, but access time increases

Engineering Contradiction:
Improvestorage capacityVSAvoidaccess time
Core Design Contradiction:
Quantity of substanceVSLoss of time

Solution Approach 1:

The memory system is segmented into multiple levels (first memory device, second memory device with fetch and prefetch regions, and storage). Frequently accessed data is kept in faster memory segments, while less frequently accessed data is stored in slower storage, resolving the contradiction between storage capacity and access time through hierarchical segmentation.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The prefetch region pre-loads data into the second memory device before it is actually needed by the processing device. This preliminary action ensures that data will be available in fast memory when needed, reducing access time while maintaining the ability to store large amounts of data in slower storage.

Inventive Principle:
Principle #10Preliminary action

2Speed

If cache memory is used to reduce access time, then access speed is improved, but memory complexity increases

Engineering Contradiction:
Improveaccess speedVSAvoidmemory complexity
Core Design Contradiction:
SpeedVSDevice complexity

Solution Approach 1:

The cache system is divided into structured regions (fetch region and prefetch region) with specific functions. This segmentation provides clear management rules and reduces the complexity of controlling the entire cache system, while still achieving improved access speed through hierarchical caching.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The prefetch region performs preliminary data loading based on prediction algorithms, reducing the frequency of accesses to slower storage. This preliminary action simplifies the overall memory access pattern and reduces the complexity of data management across multiple memory levels.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 3:

The memory manager uses feedback from data read hit ratios to dynamically update prefetch data and adjust caching strategies. This feedback mechanism optimizes cache performance while maintaining manageable complexity through data-driven decision making.

Inventive Principle:
Principle #23Feedback

3Loss of time

If prefetching is performed to reduce access frequency to storage, then access time is improved, but memory management complexity increases

Engineering Contradiction:
Improveaccess timeVSAvoidmemory management complexity
Core Design Contradiction:
Loss of timeVSDevice complexity

Solution Approach 1:

The prefetch function is isolated to a specific region (prefetch region) with dedicated management rules. This segmentation allows for simplified prefetch management compared to managing the entire memory system, reducing the complexity overhead while still achieving reduced access time to storage.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The memory manager uses feedback from data read hit ratios of each section to dynamically update prefetch data. This feedback-driven approach automates optimization decisions, reducing the need for complex manual management while improving access time through adaptive prefetching.

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS11513960B2Data storage device and operating method thereof
Publication Date: 2022.11.29 SK HYNIX INC
  • US11513960B2 patent drawing
  • US11513960B2 patent drawing
  • US11513960B2 patent drawing

AI summary

A data storage device includes a first memory device; a second memory device including a fetch region configured to store data evicted from the first memory device and a prefetch region divided into a plurality of sections; storage; and a controller configured to control the first memory device, the second memory device, and the storage. The controller may include a memory manager configured to select prefetch data having a set section size from the storage, load the selected prefetch data into the prefetch region and update the prefetch data based on a data read hit ratio of each of the plurality of sections.