Counter-Based Memory Prefetch for Partial Page Transfer
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Solution Overview
Problem
Existing memory systems face challenges in optimizing power consumption, access speeds, and capacity due to mismatched memory access protocols and inefficient data retrieval from volatile and non-volatile memory arrays.
Innovation Solution
Implementing a memory system that leverages both volatile and non-volatile memory arrays by strategically prefetching data from non-volatile to volatile arrays based on access patterns, using counters to determine likely data access, and performing partial prefetch operations to reduce power consumption and increase throughput.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If data is frequently accessed from non-volatile memory arrays, then data availability is improved, but power consumption increases
Solution Approach 1:
The system performs preliminary actions by prefetching data from non-volatile memory arrays to volatile memory arrays before actual access requests occur. Counters track access patterns and predict which data will be needed soon, allowing the system to proactively transfer data to faster volatile memory, thereby improving data availability while reducing the frequency of high-power non-volatile memory accesses.
2Quantity of substance
If memory page size is increased, then memory system capacity is improved, but access speed deteriorates
Solution Approach 1:
The system segments memory pages into smaller units that can be selectively transferred between memory arrays. Instead of moving entire large pages, the counter-based prefetch mechanism identifies and transfers only the specific data blocks or sub-pages that are likely to be accessed, maintaining high capacity while improving access speed by reducing the amount of data transferred.
3Productivity
If full page prefetch is performed, then data throughput is improved, but power consumption increases
Solution Approach 1:
The system applies partial action by transferring only the necessary portion of memory pages rather than complete pages. The counter-based prediction mechanism identifies which specific data blocks within pages will be accessed, allowing partial prefetch operations that transfer only those specific blocks to volatile memory, thereby improving throughput while consuming less power than full page transfers.
Data Source
AI summary
Methods, systems, and devices are described for wireless communications. A request for data located in a memory page of a memory array may be received at a device, and a value of a prefetch counter associated with the memory page may be identified. A portion of the memory page that includes the requested data may then be communicated between a memory array and memory bank of the device based on the value of the prefetch counter. For instance, the portion of the memory page may be selected based on the value of the prefetch counter. A second portion of the memory page may be communicated to a buffer of the device, and the value of the prefetch counter may be modified based on a relationship between the first portion of the memory page and the second portion of the memory page.