Memory Device Pre-Program Operation Mitigates Adjacent Word Line Interference
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The existing memory devices face a challenge in maintaining optimal threshold voltage distribution during program operations due to interference between adjacent word lines, leading to deterioration of memory cell performance.
Innovation Solution
A memory device and method that include a pre-program operation to increase the threshold voltage of over-erasure cells connected to adjacent word lines to the erasure state threshold voltage, thereby mitigating interference and improving voltage distribution.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If program operation is performed on memory cells connected to selected word lines, then data storage capability is improved, but threshold voltage distribution deteriorates due to interference from adjacent word lines
Solution Approach 1:
The patent applies preliminary action by performing a pre-program operation on memory cells connected to adjacent word lines before the main program operation. This pre-program operation adjusts the threshold voltage of cells on adjacent word lines to compensate for the interference that will occur during the subsequent program operation on the selected word line, thereby maintaining optimal threshold voltage distribution and memory cell performance
Solution Approach 2:
The patent utilizes parameter changes by dynamically adjusting the threshold voltage of memory cells based on their location relative to selected word lines. The control logic modifies the threshold voltage parameter of cells on adjacent word lines through the pre-program operation, changing it from an initial state to a compensated state that accounts for anticipated interference, thus resolving the contradiction between program operation effectiveness and threshold voltage distribution maintenance
Data Source
AI summary
The present technology relates to an electronic device. According to an embodiment of the present disclosure, a memory device may include a plurality of memory cells connected to each word line, a peripheral circuit configured to perform a program operation on memory cells that are connected to a selected word line, and a control logic configured to control the peripheral circuit to perform the program operation on the memory cells that are connected to the selected word line after performing a pre-program operation that increases a threshold voltage of over-erasure cells, among memory cells that are connected to an adjacent word line, having a threshold voltage of an over-erasure state that is lower than a threshold voltage of an erasure state, to the threshold voltage of the erasure state, wherein the adjacent word line is a word line that is next to the selected word line.


