Semiconductor Memory Preprogram Reduces Cell Interference

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Solution Overview

Problem

Semiconductor memory devices face interference and disturbance from adjacent memory cells during programming operations, limiting their efficiency and reliability.

Innovation Solution

A semiconductor memory device and programming method that utilize a control logic to perform a preprogram operation on target memory cells using specific reference voltages, reducing interference by moving threshold voltages to intermediate states before the main programming process, thereby minimizing disturbances from adjacent cells.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If a main program is performed directly to target memory cells, then programming speed is improved, but interference and disturbance from adjacent memory cells increases

Engineering Contradiction:

Improveprogramming speedVSAvoidinterference and disturbance from adjacent memory cells

Core Design Contradiction:

SpeedVSObject-affected harmful factors

Solution Approach 1:

The patent applies preliminary action by performing a preprogram operation before the main program operation. Specifically, memory cells that will be programmed to the highest program state are preprogrammed to an intermediate state (e.g., S3' instead of directly to S3) using a preprogram reference voltage. This preliminary positioning of threshold voltages reduces the programming pulse strength needed in the main program, thereby reducing interference and disturbance to adjacent memory cells while maintaining overall programming speed.

Inventive Principle:

Principle #10Preliminary action

2Manufacturing precision

If memory cells are programmed to highest program state directly, then manufacturing precision is maintained, but interference to adjacent cells increases

Engineering Contradiction:

Improveprogramming accuracyVSAvoiddisturbance from adjacent memory cells

Core Design Contradiction:

Manufacturing precisionVSObject-affected harmful factors

Solution Approach 1:

The preprogram operation positions threshold voltages of target memory cells to intermediate states before the main program operation. This preliminary action ensures that during the main program, weaker programming pulses are sufficient to reach the final desired states, thereby maintaining manufacturing precision while reducing disturbance to adjacent memory cells.

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The patent applies local quality by differentiating the treatment of memory cells based on their target program states. Memory cells targeting the highest program state undergo preprogramming to intermediate states, while other cells proceed directly to main programming. This localized differential approach maintains precision for critical cells while minimizing overall interference.

Inventive Principle:

Principle #3Local quality

Data Source

PatentUS10147491B2Semiconductor memory device and programming method thereof

Publication Date: 2018.12.04 SK HYNIX INC

AI summary

A semiconductor memory device includes a memory cell array, a peripheral circuit and a control logic. The memory cell array includes a plurality of memory cells each of which stores 2 or more bits of data. The peripheral circuit is configured to perform a program operation for the memory cells in the memory cell array. The control logic is configured to control the peripheral circuit and the memory cell array such that, during a program operation for target memory cells to be programmed among the memory cells, a preprogram for memory cells to be programmed to the highest program state is performed based on a predetermined value, and after the preprogram has been performed, a main program for the target memory cells to be programmed is performed.