Memory Subsystem Priority Management for Faster OTA Updates

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Solution Overview

Problem

Existing memory subsystems in automotive systems require extended downtime for Over-The-Air (OTA) updates due to background processes like maintenance and data scans, delaying vehicle operations.

Innovation Solution

The memory subsystem operates in a specialized mode that deprioritizes internal operations and optimizes buffer clearing to reduce programming time for OTA updates, using sequential block programming and adjusting trim settings for faster write performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If background processes (maintenance, garbage collection, data scans) continue during OTA updates, then memory subsystem reliability is maintained, but update completion time increases

Engineering Contradiction:
Improvememory subsystem reliabilityVSAvoidupdate completion time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The memory subsystem dynamically adjusts the priority of background processes based on the operational phase. During OTA update reception, background processes are deprioritized or suspended. During inter-programming intervals, background processes are allowed to execute. This dynamic priority adjustment resolves the contradiction by making the system behavior adaptive rather than static.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The system implements periodic execution of background processes during inter-programming intervals between OTA update segments. This periodic action allows maintenance tasks to occur without continuously interfering with the update process, thereby reducing total update time while maintaining memory reliability through regular maintenance cycles.

Inventive Principle:
Principle #19Periodic action

2Productivity

If sequential block programming is used for OTA updates, then programming speed increases, but buffer management complexity increases

Engineering Contradiction:
Improveprogramming speedVSAvoidbuffer management complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The OTA update data is divided into sequential blocks that can be programmed in order. This segmentation allows the memory subsystem to utilize high-speed sequential programming modes while managing buffer requirements in a structured way. Each block can be processed independently, simplifying the buffer management compared to handling large unsegmented data transfers.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS12430025B2Performance management using intelligent prioritization of memory operations
Publication Date: 2025.09.30 MICRON TECHNOLOGY INC
  • US12430025B2 patent drawing
  • US12430025B2 patent drawing
  • US12430025B2 patent drawing

AI summary

Exemplary methods, apparatuses, and systems include an update performance manager for controlling performance of a wireless update by adjusting prioritization of internal operations for a memory subsystem. The update performance manager receives a first notification representing an initialization of a file transfer that includes an update file from a host using wireless communication. The update performance manager enters an update mode by reducing a priority of at least one internal operation of the memory subsystem in response to the first notification. The update performance manager receives the update file. The update performance manager programs the update file to memory. The update performance manager receives a second notification being a completion of the file transfer. The update performance manager resetting the priority of the at least one internal operation of the memory subsystem to a default value in response to the second notification.