Memory System Job Routing for Related Data Access

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Solution Overview

Problem

Existing memory systems face inefficiencies in data processing due to varying accessibility and data access rates based on the position of processor units, which can impact the performance of jobs involving multiple memory devices.

Innovation Solution

A memory system architecture that includes a main data processor and a sub data processor group, with a job controller determining which processor to use based on the relationship of data processes across multiple memory devices, allowing efficient job execution by either the main or sub processors.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If a single main data processor is used to access multiple memory devices, then data access rate is improved, but device complexity increases and accessibility varies depending on position

Engineering Contradiction:
Improvedata access rateVSAvoidprocessor structure complexity
Core Design Contradiction:
SpeedVSDevice complexity

Solution Approach 1:

The system divides the processor into multiple independent sub-data processors (first sub-data processor, second sub-data processor, etc.), each capable of independently accessing memory devices. This segmentation eliminates the complexity of a single main processor managing all memory devices while maintaining high data access rates through parallel operations.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Multiple sub-data processors are combined to work collectively on data processing tasks. The job controller coordinates these processors to handle different memory devices simultaneously, achieving high-speed access without requiring a complex centralized processor structure.

Inventive Principle:
Principle #5Merging (Combining)

2Device complexity

If multiple sub data processors are used to access memory devices independently, then device complexity is reduced, but data processing efficiency decreases when accesses are related

Engineering Contradiction:
Improveprocessor structure complexityVSAvoiddata processing efficiency
Core Design Contradiction:
Device complexityVSProductivity

Solution Approach 1:

A job controller is introduced as an intermediary component that receives job requests and intelligently assigns them to appropriate sub-data processors. The job controller analyzes whether memory accesses are related and coordinates sub-processors to work together when needed, maintaining simplicity while ensuring high processing efficiency for related operations.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The system dynamically adjusts the operation mode of sub-data processors based on the nature of the job. When memory accesses are related, the job controller coordinates multiple sub-processors to work together; when accesses are independent, processors operate autonomously. This dynamic adaptation optimizes productivity without increasing structural complexity.

Inventive Principle:
Principle #15Dynamics

3Speed

If processor units are positioned closer to memory devices, then data access rate is improved, but accessibility to all memory devices varies

Engineering Contradiction:
Improvedata access rateVSAvoidmemory device accessibility
Core Design Contradiction:
SpeedVSAdaptability or versatility

Solution Approach 1:

Each sub-data processor is designed as a universal unit capable of accessing any memory device in the system. Rather than dedicating specific processors to specific memory devices, the job controller routes access requests to appropriate sub-processors based on current job requirements, ensuring equal accessibility and consistent data access rates across all memory devices.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS12386554B2Memory system and method of operating the same
Publication Date: 2025.08.12 SK HYNIX INC
  • US12386554B2 patent drawing
  • US12386554B2 patent drawing
  • US12386554B2 patent drawing

AI summary

A memory system for efficiently processing data in performing a job may include a plurality of memory devices configured to store data, a main data processor configured to access the plurality of memory devices, a sub data processor group including a plurality of sub data processors each configured to access the plurality of memory devices, respectively, a host interface configured to receive, from a host, a request for a job, and a job controller configured to perform the job by using one of the main data processor and the sub data processor group depending on whether accesses to the plurality of memory devices are related to each other for the job.