Memory Device Program Loop Start Control

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Solution Overview

Problem

Current memory devices face challenges in reducing program operation time due to the need for multiple verify voltage applications in each program loop, which lengthens the overall programming process.

Innovation Solution

The memory device employs a program operation controller and a start loop manager to generate start loop information based on program verification results, allowing for a blind program operation that omits unnecessary verify voltage applications, thereby shortening the program time by controlling the application of verify voltages during subsequent program loops.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If multiple verify voltage applications are performed in each program loop to ensure accurate programming, then program verification reliability is improved, but program operation time increases

Engineering Contradiction:
Improveprogram verification reliabilityVSAvoidprogram operation time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent applies preliminary action by performing a first program operation on a first page before a second page, generating start loop information from the first page's program loop data. This pre-established information is then reused in the second program operation, allowing the system to skip redundant verify voltage applications and directly proceed to necessary verification steps, thus reducing overall program operation time while maintaining reliability

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent implements partial action by selectively applying verify voltages only when necessary based on the start loop information. Instead of performing complete verify voltage sequences in every program loop, the system determines the appropriate starting point for verification and applies verify voltages only for the remaining necessary loops, reducing unnecessary operations while ensuring adequate verification

Inventive Principle:
Principle #16Partial or excessive action

2Manufacturing precision

If verify voltages are applied in every program loop to ensure thorough verification, then programming accuracy is improved, but program operation efficiency deteriorates

Engineering Contradiction:
Improveprogramming accuracyVSAvoidprogram operation efficiency
Core Design Contradiction:
Manufacturing precisionVSProductivity

Solution Approach 1:

The patent implements feedback by using the program loop information obtained from the first program operation as start loop information for the second program operation. This feedback mechanism allows the system to adapt the verification process based on previous results, determining the appropriate starting point for verify voltage applications and avoiding redundant operations, thereby improving efficiency while maintaining accuracy

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The patent applies dynamics by making the verify voltage application process adaptive rather than static. The start loop information dynamically determines when to begin verify voltage applications in subsequent program operations, allowing the verification process to flexibly adjust based on the state of previously programmed pages, thus optimizing both accuracy and efficiency

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS11031084B1Memory device and method of operating the same
Publication Date: 2021.06.08 SK HYNIX INC
  • US11031084B1 patent drawing
  • US11031084B1 patent drawing
  • US11031084B1 patent drawing

AI summary

A memory device, in accordance with a method of operation, may include: a plurality of pages coupled to a common word line and configured to be sequentially selected by different select lines; a program operation controller configured to perform a program operation on a first page that is to be programmed first, among the plurality of pages; and a start loop manager configured to generate start loop information about a program loop in which program verification corresponding to each of a plurality of program states to be formed by threshold voltages of memory cells included in the first page starts, during the program operation on the first page. The program operation controller is further configured to perform a program operation on a second page to be programmed subsequent to the first page, among the plurality of pages, based on the start loop information.