Semiconductor Memory Device Program Method Selection

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Solution Overview

Problem

Current semiconductor memory devices lack an efficient method to differentiate and manage program operations between memory blocks with erased and programmed cells, leading to suboptimal programming and reading processes.

Innovation Solution

A semiconductor memory device with a control logic that selects between a first and second program/method based on program mode information stored in a Content-Addressable Memory (CAM) block, allowing for tailored programming and reading operations for memory blocks with either erased or programmed cells, without requiring a separate erase operation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If a single program method is used for all memory blocks, then the device complexity is reduced, but the program operation time increases and efficiency decreases

Engineering Contradiction:
Improveprogram operation efficiencyVSAvoidcontrol logic complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent segments the program operation into two distinct methods: a first program method for erased memory blocks and a second program method for programmed memory blocks. The control logic selects the appropriate method based on the program state of the target memory block, thereby optimizing program operation efficiency for each case while managing complexity through structured segmentation.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent implements dynamic selection between program methods based on the real-time program state of memory blocks. The control logic adapts the program operation approach by checking whether the target memory block contains erased or programmed cells and selecting the corresponding program method, enabling flexible and efficient program operations across different memory block states.

Inventive Principle:
Principle #15Dynamics

2Loss of time

If additional programming is performed on programmed memory blocks without erasing, then the program operation time is reduced, but the risk of data interference increases

Engineering Contradiction:
Improveprogram operation timeVSAvoiddata integrity
Core Design Contradiction:
Loss of timeVSReliability

Solution Approach 1:

The patent applies local quality by performing additional programming operations only on specific programmed memory cells within a memory block that require updating, while leaving other programmed cells unchanged. This targeted approach reduces program operation time for modified cells without causing interference to other cells, thereby maintaining data integrity while improving efficiency.

Inventive Principle:
Principle #3Local quality

3Productivity

If memory block state differentiation is implemented, then the program operation efficiency is improved, but the device complexity increases due to additional control logic

Engineering Contradiction:
Improveprogram operation speedVSAvoidcontrol logic structure
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent implements preliminary action by having the control logic check the program state of the target memory block before initiating the program operation. This pre-check enables the control logic to select the appropriate program method in advance, optimizing program operation speed while managing complexity through a structured preliminary assessment mechanism.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent employs feedback by using the program state information of memory blocks to dynamically select the program method. The control logic receives feedback about whether the target memory block contains erased or programmed cells and adjusts the program operation accordingly, improving efficiency through state-aware decision-making while maintaining manageable complexity through feedback-driven adaptation.

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS9836216B2Semiconductor memory device and operating method thereof
Publication Date: 2017.12.05 SK HYNIX INC
  • US9836216B2 patent drawing
  • US9836216B2 patent drawing
  • US9836216B2 patent drawing

AI summary

Provided herein is a semiconductor memory device and an operating method thereof. The semiconductor memory device may include a memory cell array, a peripheral circuit, and a control logic. The memory cell array may include a plurality of memory blocks. The peripheral circuit may perform a program operation or read operation on a selected memory block of the memory cell array. The control logic may select between a first program method and a second program method depending on program mode information for the selected memory block, and may control the peripheral circuit to perform the program operation on the selected memory block using the selected program method.