Memory Program Peak Current Reduction via Voltage Ramp Control
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Solution Overview
Problem
Memory devices face challenges with high peak current consumption during program operations, particularly in the first program loop, which can lead to power supply issues and reduced reliability due to increased voltages on unselected word lines.
Innovation Solution
Implementing a current reduction countermeasure by adjusting the ramp up rate of voltage for unselected word lines, either through a reduced ramp up rate, delayed voltage increases for different groups, or reducing the read pass voltage, to minimize peak current consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If voltage is increased on unselected word lines during program operation, then program operation can be performed, but peak current consumption increases
Solution Approach 1:
The patent applies dynamics by making the voltage ramp-up rate adjustable rather than fixed. The system dynamically adapts the voltage increase rate based on the read condition (first or second read condition) to optimize between program operation effectiveness and peak current consumption. This is achieved through control circuitry that modifies the ramp-up characteristics of voltage signals applied to unselected word lines.
Solution Approach 2:
The patent changes the voltage ramp-up rate parameter based on detected read conditions. When a first read condition is detected, a first (slower) ramp-up rate is used, while when a second read condition is detected, a second (faster) ramp-up rate is used. This parameter adaptation allows the system to reduce peak current consumption while maintaining program operation capability.
2Speed
If voltage ramp up rate is increased for unselected word lines, then program operation speed improves, but power supply stability deteriorates
Solution Approach 1:
The system dynamically adjusts the voltage ramp-up rate based on power supply stability requirements. By detecting the read condition and adapting the ramp-up characteristics accordingly, the system ensures that power supply stability is maintained while still achieving adequate program operation speed. The control circuitry monitors and responds to power supply conditions in real-time.
Solution Approach 2:
The patent applies preliminary anti-action by proactively reducing the voltage ramp-up rate when a first read condition is detected, before power supply instability can occur. This preventive measure counteracts the potential harmful effect of excessive peak current by adjusting the voltage increase rate in advance, based on the detected read condition.
3Ease of operation
If voltage is applied to unselected word lines, then memory cell programming is enabled, but power supply quenching occurs
Solution Approach 1:
The patent changes the voltage application parameters by using different ramp-up rates based on read conditions. When a first read condition is detected, the system uses a slower ramp-up rate that prevents power supply quenching while still enabling memory cell programming. This parameter adaptation resolves the contradiction between programming capability and power supply stability.
Solution Approach 2:
The system uses feedback by detecting the read condition (first or second read condition) and using this information to adjust the voltage ramp-up rate. The control circuitry receives feedback about the current state and modifies the voltage application characteristics accordingly, preventing power supply quenching while maintaining programming functionality.
Data Source
AI summary
Apparatuses and techniques are described for reducing a peak current consumption during a program operation for a memory device. A higher current peak occurs in a first program loop of the program operation when a set of word lines is in a discharged state, also referred to as a first read condition. A current reduction countermeasure can be used when ramping up voltages of unselected word lines to a read pass voltage during the verify phase of the program loop. The countermeasure can involve reducing the ramp up rate, reducing the read pass voltage, or delaying the start of the ramp up for a portion of the word lines.


