Memory Cell Programming with Dynamic Max Pulse Control
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Solution Overview
Problem
Existing non-volatile memory technologies face challenges in selecting the optimal number of program loops, leading to yield losses or unintended state transitions in memory cells due to conservative or relaxed settings.
Innovation Solution
A control circuit or controller dynamically determines a first intermediate quantity of voltage pulses needed for memory cells to reach verify levels, ending the program operation after a maximum allowable quantity based on this intermediate quantity, optimizing the programming process.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If a fixed maximum program counter value is used, then the programming process is simple to implement, but yield losses occur due to conservative settings or unintended state transitions
Solution Approach 1:
The patent applies dynamics by transitioning from a fixed maximum program counter value to a dynamic determination approach. The control circuit determines the maximum program counter value dynamically based on the actual programming progress and verify results, allowing the system to adapt to variations in memory cell programming characteristics while maintaining simplicity in implementation.
Solution Approach 2:
The patent implements feedback by using verify operations to monitor programming progress and adjust the program counter accordingly. The control circuit receives feedback from verify results and uses this information to determine when to terminate the programming sequence, preventing both yield losses from conservative settings and unintended state transitions from relaxed settings.
2Reliability
If a conservative maximum program counter value is used, then unintended state transitions are minimized, but yield losses increase due to premature termination
Solution Approach 1:
The patent uses feedback from verify operations to dynamically adjust the program counter. This allows the system to maintain state transition stability by stopping programming when verify confirms the desired state is achieved, while simultaneously improving programming yield by avoiding premature termination through adaptive, feedback-driven termination decisions.
Solution Approach 2:
The patent applies parameter changes by modifying the maximum program counter value based on actual programming conditions. Instead of using a fixed conservative value, the system changes the program counter parameter dynamically based on verify results, allowing optimization of both state transition stability and programming yield.
3Productivity
If a relaxed maximum program counter value is used, then programming yield improves, but unintended state transitions occur
Solution Approach 1:
The patent implements feedback-driven termination where the control circuit monitors verify results and adjusts the program counter accordingly. This feedback mechanism allows the system to achieve high programming yield by using relaxed maximum values when necessary, while simultaneously preventing unintended state transitions by stopping programming when verify confirms the desired state.
Solution Approach 2:
The patent applies dynamic parameter changes to the maximum program counter value based on actual programming progress. The control circuit changes this parameter during the programming process based on verify results, enabling the system to optimize both programming yield and state transition stability by adapting the parameter to actual conditions rather than using a fixed value.
4Reliability
If the program operation is terminated early, then unintended state transitions are prevented, but programming completeness may be compromised
Solution Approach 1:
The patent uses feedback from verify operations to determine programming completeness. The control circuit continuously monitors whether the memory cells have reached the desired verify level and terminates programming only when verify confirms completeness, ensuring both state transition stability and programming precision through adaptive, feedback-driven termination.
Solution Approach 2:
The patent applies dynamic changes to the program counter parameter based on verify results. The control circuit changes the remaining programming steps parameter according to actual progress, allowing early termination when verify confirms completeness while preventing premature termination that would compromise programming precision.
Data Source
AI summary
A memory apparatus and method of operation are provided. The apparatus includes memory cells connected to word lines and arranged in strings and configured to retain a threshold voltage corresponding to memory states. A control circuit is configured to program the memory cells to reach one of a plurality of verify levels each corresponding the memory states using a series of voltage pulses applied to the word lines during a program operation. The control circuit determines an intermediate quantity of the series of voltage pulses necessary for the memory cells associated with a selected one of the memory states to reach the one of the plurality of verify levels corresponding to the selected one of the memory states. The control circuit ends the program operation after a maximum allowable quantity of the series of voltage pulses are utilized. The maximum allowable quantity is selected based on the intermediate quantity.