Memory Device Program Voltage Control During All-Levels Programming
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Solution Overview
Problem
The all levels programming operation in memory devices results in an increased maximum program voltage level due to bitline leakage, requiring stronger voltage pumps and potentially exceeding the endurance and reliability limits of existing circuits.
Innovation Solution
Adjust the bitline, wordline, and pillar boosting voltages during the last programming pulse to manage and minimize the maximum program voltage level, by reducing the bitline voltage and adjusting the boost voltage for subsequent pulses.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If all levels programming operation is performed with increased programming pulses, then programming speed is improved, but maximum program voltage level increases due to bitline leakage
Solution Approach 1:
The patent dynamically adjusts the bitline voltage parameter during the programming operation. Specifically, the bitline voltage is reduced or disabled during the last programming pulse to compensate for bitline leakage effects, thereby controlling the maximum program voltage level while maintaining programming speed.
Solution Approach 2:
The patent implements dynamic voltage adjustment by modifying the bitline voltage based on the programming pulse sequence. The voltage level changes during operation (higher during initial pulses, reduced during the last pulse), allowing the system to adapt to leakage effects and maintain reliability without sacrificing overall programming speed.
2Reliability
If stronger voltage pumps are used to overcome bitline leakage, then programming operation is maintained, but device complexity and power consumption increase
Solution Approach 1:
Instead of using stronger voltage pumps, the patent changes the bitline voltage parameter dynamically during the programming operation. By reducing the bitline voltage during the last pulse, the system compensates for leakage without requiring increased pump strength, thereby avoiding additional device complexity and power consumption.
Solution Approach 2:
The patent uses the existing voltage pump infrastructure and adjusts its operation through parameter changes rather than adding more powerful hardware. The system serves itself by intelligently modulating the bitline voltage to compensate for leakage, eliminating the need for stronger voltage pumps.
3Reliability
If bitline voltage is reduced during last programming pulse, then maximum program voltage is controlled, but programming precision may be affected
Solution Approach 1:
The patent applies a controlled parameter change to the bitline voltage specifically during the last programming pulse. This targeted adjustment compensates for bitline leakage effects at the critical final stage without affecting the precision of earlier programming pulses, thereby maintaining both voltage control and programming precision.
Solution Approach 2:
The patent performs preliminary programming with standard voltage levels in earlier pulses, establishing the foundation for the programming operation. The bitline voltage reduction is applied only in the final pulse as a corrective measure for leakage, ensuring that the bulk of programming precision is achieved before the voltage adjustment.
Data Source
AI summary
Control logic in a memory device initiates a program operation including application of a set of programming pulses to a wordline associated with one or more memory cells of a memory array to be programmed to a set of programming levels, where each programming level of the set of programming levels is programmed by each programming pulse. The control logic determines that a program voltage of a programming pulse of the set of programming pulses reaches a maximum program voltage level. In response to the determining, applying a subsequent programming pulse having a subsequent program voltage that is below the maximum program voltage level.