Memory Cell Programming with Adaptive Word Line Boost Voltage
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Solution Overview
Problem
Existing memory devices face challenges in improving program efficiency, particularly due to voltage fluctuations that degrade performance and prolong program time.
Innovation Solution
A memory device with a peripheral circuit that includes a control logic and voltage generators to manage incremental step-pulse programming, adjusting the target voltage difference and channel boost voltage based on the target program voltage to minimize transistor damage and optimize voltage rise speed.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If incremental step-pulse programming is used to program memory cells, then program efficiency can be improved, but voltage fluctuations occur that degrade performance and prolong program time
Solution Approach 1:
The patent applies preliminary action by pre-charging the word line to a controlled voltage level before applying the program pulse. The word line is charged to a voltage that is higher than the program pulse voltage by a predetermined amount, which compensates for voltage drops during the programming operation. This preliminary voltage preparation ensures stable voltage conditions throughout the programming process, preventing performance degradation while maintaining improved program efficiency through incremental step-pulse programming
2Loss of time
If higher program voltages are applied to speed up programming, then program time is reduced, but transistor degradation increases
Solution Approach 1:
The patent implements dynamics by making the word line voltage adjustable and adaptive throughout the programming process. The word line voltage is dynamically controlled to be higher than the program pulse voltage by a controlled amount, allowing the system to optimize the voltage conditions for each programming step. This dynamic voltage control enables faster programming with higher voltages while preventing excessive transistor degradation through precise voltage management
Solution Approach 2:
The patent applies parameter changes by modifying the word line voltage parameter to compensate for voltage drops during programming. The control logic adjusts the word line voltage to maintain an optimal voltage difference between the word line and program pulse, ensuring that the actual voltage applied to the memory cell remains within safe limits for transistor protection while achieving faster programming speeds
Data Source
AI summary
Examples of the present disclosure provide a memory device and an operation method thereof, and a memory system. The memory device includes: a memory cell array; and a peripheral circuit coupled to the memory cell array and configured to: determine a target voltage difference according to a target program voltage; determine a channel boost voltage according to a difference between the target program voltage and the target voltage difference; apply the channel boost voltage to a selected word line during a channel boost stage; and apply the target program voltage to the selected word line during a program pulse stage.