Parallel Memory Programming Order Optimization

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Solution Overview

Problem

In parallel data storage operations, the programming duration of memory units varies, leading to staggered data page storage across multiple memory dies, resulting in suboptimal performance due to sequential communication over a shared bus, where slower dies delay the overall completion.

Innovation Solution

A method and system where the processor in a memory system stores data by programming memory units in an order inversely related to their respective programming durations, with slower dies programmed first and faster dies last, using information such as mapping tables generated during production or updated during operation to optimize the storage process.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If parallel programming is performed on multiple memory units simultaneously, then storage throughput is improved, but overall completion time increases due to staggered programming durations

Engineering Contradiction:
Improvestorage throughputVSAvoidoverall completion time
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The system performs preliminary characterization of each memory unit's programming duration during production testing or initial operation. This information is stored in a lookup table that guides the programming order selection, allowing the system to pre-plan the optimal sequencing strategy before actual data storage operations begin.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The programming order is dynamically selected based on the specific stripe being programmed. The controller chooses from different predefined orders (first order, second order, third order) depending on which memory units are included in the current stripe, allowing the system to adapt the sequencing strategy to match the actual programming duration characteristics of the units involved.

Inventive Principle:
Principle #15Dynamics

2Device complexity

If memory units are programmed in arbitrary order, then system complexity is reduced, but parallelization efficiency decreases due to slower dies delaying completion

Engineering Contradiction:
Improveprogramming control complexityVSAvoidparallelization efficiency
Core Design Contradiction:
Device complexityVSProductivity

Solution Approach 1:

The system segments memory units into different programming duration categories (fast, medium, slow) and assigns them to different positions in the programming sequence. By dividing the memory units based on their performance characteristics and applying targeted sequencing strategies to each segment, the system achieves efficient parallelization without requiring complex real-time monitoring and adjustment mechanisms.

Inventive Principle:
Principle #1Segmentation

3Loss of time

If programming order is optimized based on duration characteristics, then overall programming time is reduced, but system complexity increases due to order management

Engineering Contradiction:
Improveprogramming durationVSAvoidorder management complexity
Core Design Contradiction:
Loss of timeVSDevice complexity

Solution Approach 1:

Different programming orders are applied to different stripes based on their specific composition of memory units. Rather than using a single universal ordering strategy, the system tailors the programming sequence to the local characteristics of each stripe, optimizing performance for each specific group of units while maintaining overall system manageability through standardized order templates.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS9632706B2Ordering of parallel data storage based on die programming durations
Publication Date: 2017.04.25 APPLE INC
  • US9632706B2 patent drawing
  • US9632706B2 patent drawing
  • US9632706B2 patent drawing

AI summary

A method includes, in a memory system that includes multiple memory units, holding information indicative of respective programming durations of the memory units. Data is stored in a stripe that includes a plurality of the memory units, by programming the memory units in the stripe in an order that is set based on the information.