Nonvolatile Memory Programming via Divide-by-2 Grouping
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Solution Overview
Problem
Conventional programming methods for nonvolatile semiconductor memory devices are inefficient due to increased time requirements and complexity, as they involve repeated high-voltage applications and verify operations, especially when programming multiple memory cells, leading to prolonged programming durations and complex circuitry needs.
Innovation Solution
A method that involves sequentially performing divide-by-2 operations on memory cells to form gradually reduced groups, programming each group, and verifying only after the final group is completed, thereby reducing the number of programming steps and verify operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If repeated high-voltage applications and verify operations are performed for each memory cell, then programming reliability is improved, but programming time and device complexity increase significantly
Solution Approach 1:
The patent divides the memory cells into multiple groups and performs programming operations on these groups in a systematic manner. By segmenting the memory cells and using a counter to track programming iterations, the system can efficiently manage and verify programming across all cells without requiring repeated full-scan verify operations, thus reducing time while maintaining reliability.
Solution Approach 2:
The patent introduces a counter that is initialized before the programming operation to track the number of programming iterations. This preliminary tracking mechanism allows the system to know when to stop programming and when verify operations are necessary, eliminating unnecessary repeated operations and reducing overall programming time while ensuring reliability.
2Manufacturing precision
If multiple verify operations are inserted after each programming step, then programming precision is improved, but device complexity and programming duration increase
Solution Approach 1:
The patent combines the programming and verifying operations into a unified process that operates on memory cell groups. By merging these operations and using a counter to manage iterations, the system achieves precise programming without requiring separate complex verify circuits for each operation, thus reducing device complexity while maintaining precision.
Solution Approach 2:
The patent uses a counter as a feedback mechanism to track the number of programming iterations and determine when verify operations are necessary. This feedback approach allows the system to adjust the programming process dynamically, performing verify operations only when needed based on the counter state, thereby reducing circuit complexity while maintaining programming precision.
3Reliability
If high voltage is applied to each memory cell transistor sequentially, then programming completeness is ensured, but programming time increases proportionally with the number of cells
Solution Approach 1:
The patent segments the memory cells into groups and applies high voltage to these groups simultaneously rather than sequentially. By dividing the memory array into manageable groups and using a counter to track progress, the system ensures complete programming of all cells while significantly reducing the total programming time compared to sequential processing of individual cells.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach significantly reduces the overall programming time and simplifies the memory device circuitry by minimizing the number of programming steps and consolidating the verify operation to the final group, ensuring efficient programming of nonvolatile semiconductor memory devices.
Implementation Method 1
during the program operation, hot electrons need to be injected from the channel region adjacent to the drain region 14 to the floating gate electrode
Implementation Method 2
during the erase operation, the hot electrons injected into the floating gate 16 during the program operation need to be removed
Data Source
AI summary
A method for programming a plurality of memory cells of a nonvolatile semiconductor memory device comprises the steps of: sequentially performing a plurality of divide-by-2 operations on the plurality of memory cells; generating a plurality of reduced groups from the memory cells after each of the divide-by-2 operations is performed; sequentially programming the memory cells of each reduced group; generating a final group after a final divide-by-2 operation is performed; programming the memory cells of the final group; and verifying whether the memory cells of the final group are completely programmed. The memory cells of the final group are composed of all the memory cells of the nonvolatile semiconductor memory device and the verifying step is only performed after the step of programming the memory cells of the final group.