Memory Programming Error Check for Reliable Data Transfer

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Solution Overview

Problem

Existing memory systems experience performance deterioration and reduced efficiency due to data transfer errors, which can lead to incomplete or incorrect data storage, particularly in portable electronic devices where reliability and speed are crucial.

Innovation Solution

A memory system and operating method that incorporates a controller and memory device capable of performing simultaneous or sequential error check and program operations, utilizing error correction codes and data randomization to ensure data integrity by checking the ratio of 0's to 1's in memory cells, allowing for retransfer of data if errors are detected, thereby maintaining data accuracy and system performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If error check operation is performed separately from program operation, then data accuracy is improved, but operation time increases

Engineering Contradiction:
Improvedata accuracyVSAvoidoperation time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent combines the error check operation with the program operation into a single integrated process. The memory device performs both operations simultaneously or in overlapping time periods, where the error check operation verifies data while the program operation stores data, eliminating the need for separate execution and reducing total operation time.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The error check operation is performed preliminarily during the program operation process rather than after completion. By checking for errors while the program operation is still in progress, the system can detect and handle errors earlier, preventing wasted time on completing unnecessary operations and enabling faster retransmission if errors occur.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If data retransfer is performed upon error detection, then data reliability is improved, but system productivity decreases

Engineering Contradiction:
Improvedata reliabilityVSAvoidsystem productivity
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The system implements a feedback mechanism where the error check operation continuously monitors data integrity during the program operation. When an error is detected, the system provides feedback to trigger a retransfer of the specific erroneous data portion. This targeted feedback approach ensures data reliability while minimizing the impact on overall productivity by only retransmitting affected data rather than entire data sets.

Inventive Principle:
Principle #23Feedback

3Measurement precision

If error check operation is performed on entire data, then measurement precision is improved, but device complexity increases

Engineering Contradiction:
Improveerror detection accuracyVSAvoidoperation complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent segments the error check operation to focus only on the specific data portions that are being programmed at any given time, rather than checking the entire data set. This segmentation allows for precise error detection in relevant areas while reducing the overall complexity and computational burden of the error checking process.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS10678633B2Memory system and operating method thereof
Publication Date: 2020.06.09 SK HYNIX INC
  • US10678633B2 patent drawing
  • US10678633B2 patent drawing
  • US10678633B2 patent drawing

AI summary

A memory system includes a controller configured to transfer first data for a program operation, and a memory device configured to perform an error check operation for determining whether second data received from the controller are equal to the first data and the program operation for storing the first data.