Semiconductor Memory Programming With Adjacent Page Error Checks
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Solution Overview
Problem
Existing semiconductor memory devices face reliability issues due to the lack of effective error bit checks during programming operations, which can lead to read failures and reduced integration density in three-dimensional memory structures.
Innovation Solution
A method and system for operating semiconductor memory devices that includes applying a program pulse to a first page and determining if the number of pulse applications exceeds a critical value, followed by an error bit check on an adjacent page coupled to the same word line, using a controller to manage the operation and perform error bit checks based on threshold voltage changes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If program pulses are applied to program data in a first page, then data programming is achieved, but error bits may be generated in adjacent pages due to threshold voltage changes
Solution Approach 1:
The patent performs error bit checks on adjacent pages during the programming process of the first page, rather than waiting until after programming is complete. By proactively checking for error bits caused by threshold voltage changes in adjacent pages during programming, the system can detect and mitigate errors before they propagate, thereby improving data integrity while addressing the harmful effect of adjacent page interference
Solution Approach 2:
The patent implements a feedback mechanism where the controller monitors threshold voltage changes in adjacent pages during programming operations. When error bits are detected in adjacent pages due to threshold voltage shifts, the system responds by performing corrective actions such as re-programming or data recovery operations, creating a closed-loop control system that continuously monitors and corrects errors to maintain data integrity
2Quantity of substance
If three-dimensional memory structure is used to increase integration density, then storage capacity is improved, but error bit generation increases due to closer page coupling
Solution Approach 1:
In three-dimensional memory structures where pages are closely coupled, the patent applies preliminary error bit checks on adjacent pages before they can be affected by programming operations. This proactive approach is particularly important in 3D structures where physical proximity increases interference, allowing the system to detect and correct errors before they compromise data integrity in high-density storage configurations
Solution Approach 2:
The patent implements continuous monitoring and feedback mechanisms that track threshold voltage changes in adjacent pages within three-dimensional memory structures. When error bits are detected due to the close coupling inherent in 3D architectures, the system automatically triggers corrective operations, creating a self-regulating mechanism that maintains reliability despite the increased integration density and associated interference
3Reliability
If error bit check is performed on adjacent page during programming, then reliability is improved, but operation time increases
Solution Approach 1:
The patent performs error bit checks on adjacent pages during the programming process itself, rather than as a separate post-programming step. By integrating the error check into the programming operation and performing it preliminarily while programming is ongoing, the system reduces total operation time while maintaining improved reliability through continuous monitoring of threshold voltage changes
Solution Approach 2:
The patent merges the error bit check operation with the programming operation by performing both simultaneously on different pages. The controller executes programming on the first page while concurrently performing error bit checks on adjacent pages, combining two previously separate operations into one integrated process that reduces total execution time while maintaining enhanced reliability
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the reliability of semiconductor memory devices by detecting and mitigating error bits, thereby reducing read failures and improving data integrity in three-dimensional memory structures.
Implementation Method 1
a program pulse applied to a first word line coupled to a first page and a second page, the program pulse being applied to the first word line to program data into the first page
Implementation Method 2
determining whether a threshold value of a memory cell included in the second page has changed from a first value to a second value, and whether the second value is greater than a value of a read voltage used to verify a state of the memory cell
Data Source
AI summary
A method for operating a semiconductor memory device may include applying a program pulse for programming data of a first page included in the semiconductor memory device. The method may include determining whether the number of times of applying the program pulse has exceeded a first critical value. The method may include performing an error bit check on a second page coupled to the same word line as the first page, based on the determined result of whether the first critical value has been exceeded.