Nonvolatile Memory Programming via Ground Selection Voltage Maintenance

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Solution Overview

Problem

Nonvolatile memory devices, particularly three-dimensional NAND flash memory devices, face increased program disturbance and performance degradation due to smaller channel hole sizes and higher bit numbers in multiple level cells, leading to inefficiencies in programming operations.

Innovation Solution

The method involves maintaining the turn-on voltage of the selected ground selection transistor without recovery after the verification read period, precharging channels for subsequent program loops, which reduces power consumption and enhances operation speed by suppressing current due to voltage transitions and advancing the bit line setup period.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If the turn-on voltage is applied to the selected ground selection transistor only during the verification read period and then recovered, then the power consumption is reduced and the operation speed is improved, but the channel precharging for the next program loop is delayed

Engineering Contradiction:
Improveprogramming operation efficiencyVSAvoidchannel precharge time
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The turn-on voltage is maintained on the selected ground selection transistor beyond the verification read period into the read recovery period, performing the channel precharging action in advance for the next program loop. This preliminary action eliminates the need to wait for the next program loop to start before precharging channels, thereby improving programming operation efficiency without extending the critical program execution time.

Inventive Principle:
Principle #10Preliminary action

2Speed

If the turn-on voltage is maintained without recovery after the verification read period, then the channel precharging is advanced for the next program loop, but the power consumption increases due to extended voltage application

Engineering Contradiction:
Improveoperation speedVSAvoidpower consumption
Core Design Contradiction:
SpeedVSUse of energy by moving object

Solution Approach 1:

The turn-on voltage is maintained only on the selected ground selection transistor that corresponds to the previously selected cell string, rather than applying voltage to all ground selection transistors. This localized voltage maintenance precharges only the relevant channel for the next program loop, advancing the operation speed while minimizing power consumption by avoiding unnecessary voltage application to unselected transistors.

Inventive Principle:
Principle #3Local quality

3Productivity

If three-dimensional NAND memory structures are used to increase integration degree and memory capacity, then the device integration and memory capacity are improved, but the program disturbance on unselected memory cells increases

Engineering Contradiction:
Improvememory capacityVSAvoidprogram disturbance
Core Design Contradiction:
ProductivityVSObject-generated harmful factors

Solution Approach 1:

The ground selection transistor is turned on before the program operation begins, during the read recovery period of the previous program loop. This preliminary activation ensures that the channel is precharged and ready, allowing the program voltage to be applied more efficiently with better confinement to the selected cell string, thereby reducing program disturbance on unselected memory cells in three-dimensional NAND structures.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS10892015B2Nonvolatile memory device and method of programming in the same
Publication Date: 2021.01.12 SAMSUNG ELECTRONICS CO LTD
  • US10892015B2 patent drawing
  • US10892015B2 patent drawing
  • US10892015B2 patent drawing

AI summary

In a method of programming in a nonvolatile memory device, channels of a plurality of cell strings are precharged through ground selection transistors by a precharge voltage of a source line. A turn-on voltage is applied to a selected ground selection transistor of a selected cell string among the plurality of cell strings, during a verification read period of an N-th program loop. The turn-on voltage applied to the selected ground selection transistor is maintained to precharge the channels for an (N+1)-th program loop, without recovery after the verification read period of the N-th program loop is finished. Power consumption is reduced and an operation speed is increased by maintaining the turn-on voltage of the selected ground selection line to precharge the channels of the cell strings without recovery after the verification read operation is finished.