Semiconductor Memory Programming Sequence for Interference Reduction

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Solution Overview

Problem

Existing semiconductor devices face interference issues between adjacent memory cells during programming operations, particularly due to the Incremental Step Pulse Program (ISPP) method, which results in threshold voltage shifts exceeding target levels.

Innovation Solution

A method and semiconductor device that alter the order of operations by performing Least Significant Bit (LSB), soft, and Most Significant Bit (MSB) programming operations on memory cells, including specific even and odd page operations to manage and raise threshold voltages, thereby reducing interference between adjacent cells.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If ISPP method is used to program memory cells, then programming precision is improved, but interference between adjacent cells increases causing threshold voltage shifts exceeding target levels

Engineering Contradiction:
Improveprogramming precisionVSAvoidinterference between adjacent cells
Core Design Contradiction:
Manufacturing precisionVSObject-affected harmful factors

Solution Approach 1:

The patent segments the programming operation into distinct phases: LSB programming phase, soft programming phase, and MSB programming phase. Each phase targets specific bit positions and applies different voltage pulse sequences, thereby reducing interference between adjacent cells while maintaining programming precision through controlled incremental steps in each phase.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent performs preliminary LSB programming before soft programming, and soft programming before MSB programming. This sequential preliminary action ensures that lower significance bits are programmed first with minimal interference, then higher significance bits are programmed in subsequent phases with reduced interference, ultimately achieving precise threshold voltage control.

Inventive Principle:
Principle #10Preliminary action

2Object-affected harmful factors

If even and odd memory strings are programmed separately, then interference between adjacent strings is suppressed, but programming time increases

Engineering Contradiction:
Improveinterference between adjacent stringsVSAvoidprogramming time
Core Design Contradiction:
Object-affected harmful factorsVSLoss of time

Solution Approach 1:

The patent segments the programming process into LSB, soft, and MSB phases that can be applied across both even and odd memory strings. By organizing the operations this way, the system can efficiently manage interference between adjacent strings while reducing overall programming time through optimized phase sequencing and parallel processing capabilities.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent employs periodic action by alternating between even and odd memory string programming within the LSB, soft, and MSB phases. This periodic sequencing allows interference suppression between adjacent strings while maintaining efficient programming throughput through systematic rotation between string types across different phases.

Inventive Principle:
Principle #19Periodic action

Data Source

PatentUS8830744B2Semiconductor device and method of programming the same
Publication Date: 2014.09.09 SK HYNIX INC
  • US8830744B2 patent drawing
  • US8830744B2 patent drawing
  • US8830744B2 patent drawing

AI summary

A method of programming a semiconductor device includes performing a Least Significant Bit (LSB) program operation on selected memory cells, performing a soft program operation on the remaining memory cells other than memory cells on which the LSB program operation has been performed, and performing a Most Significant Bit (MSB) program operation on memory cells, selected from among the memory cells on which the LSB program operation has been performed and the memory cells on which the soft program operation has been performed.