3D Memory Programming via Word Line Layer Alternation
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Solution Overview
Problem
Rewritable non-volatile memory modules, such as flash memory, face data loss issues due to open or short circuits in word lines during programming, as they lack sufficient random access memory for buffering data, especially in compact devices like solid state drives.
Innovation Solution
A memory programming method and apparatus that utilize a physical erasing unit with multiple word line layers and bit line sets, allowing data to be programmed in a way that alternates between different word line layers to prevent data loss in case of programming failures, using a memory control circuit to issue command sequences for programming data streams across multiple physical programming units.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a buffer memory is added to store programmed data for re-writing process, then data loss prevention is improved, but device size and complexity increase
Solution Approach 1:
The memory device is divided into multiple independent word line layers (first word line layer, second word line layer, etc.), each capable of storing data independently. This segmentation allows the system to distribute data across multiple layers without requiring a centralized buffer memory, thus preventing data loss while maintaining device compactness.
Solution Approach 2:
The patent transitions from a two-dimensional memory structure to a three-dimensional stacked structure with multiple word line layers arranged in the vertical dimension. This dimensional change enables increased storage capacity and redundancy without expanding the horizontal footprint, avoiding the need for additional buffer memory components.
2Reliability
If a large volume random access memory is disposed in compact memory devices, then data buffering capability is improved, but device size increases
Solution Approach 1:
The patent merges the storage function with the buffer function by utilizing the same memory cell array and word line structures for both purposes. The multiple word line layers serve dual roles as both permanent storage and temporary buffer, eliminating the need for separate buffer memory components and reducing overall device volume.
Solution Approach 2:
The memory structure is designed to perform multiple functions: it can store data permanently in the flash memory cells, temporarily buffer programmed data during writing operations, and provide redundancy through multiple word line layers. This multi-functionality eliminates the need for dedicated buffer memory, maintaining compact device size.
Data Source
AI summary
A memory programming method for a physical erasing unit of a rewritable non-volatile memory is provided. The method includes: programming a first data stream into a first physical programming unit, wherein the first physical programming unit is constituted by memory cells at intersection of a first bit line set of the physical erasing unit and a first word line layer of the physical erasing unit. The method further includes: after programming the first data stream into the first physical programming unit, programming another data stream into another physical programming unit, and the another physical programming unit is constituted by the memory cells at intersection of the first bit line set of the physical erasing unit and another word line layer of the physical erasing unit.