Memory Programming Mode That Defers Maintenance Operations

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Solution Overview

Problem

Memory systems experience increased latency and costs due to maintenance operations such as garbage collection and programming operations, which are inefficient and time-consuming, especially during pre-soldering and in-system programming stages.

Innovation Solution

The memory system reduces latency by minimizing maintenance operations during programming modes through techniques like disabling or delaying garbage collection, error correction, and power management, and by tracking data written to manage efficient resource allocation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If maintenance operations such as garbage collection and error correction are performed during programming, then data integrity and reliability are improved, but programming time and latency increase

Engineering Contradiction:
Improvedata integrityVSAvoidprogramming time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The system performs preliminary actions by disabling or delaying maintenance operations (garbage collection, error correction, power management) during the programming mode. This allows the programming operation to complete quickly without waiting for these maintenance tasks, and the maintenance operations are scheduled to run later when appropriate, thus resolving the contradiction between maintaining data integrity and reducing programming time.

Inventive Principle:
Principle #10Preliminary action

2Productivity

If garbage collection is performed during programming operations, then storage efficiency is improved, but programming latency increases

Engineering Contradiction:
Improvestorage efficiencyVSAvoidprogramming latency
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The system disables garbage collection during programming mode as a preliminary action to ensure that programming operations complete without delay. The garbage collection is performed later when the programming mode is exited and the system returns to normal operation, thus maintaining storage efficiency while avoiding programming latency.

Inventive Principle:
Principle #10Preliminary action

3Adaptability or versatility

If multiple maintenance operations are performed concurrently with programming, then system functionality is maintained, but resource consumption and complexity increase

Engineering Contradiction:
Improvesystem functionalityVSAvoidoperation management complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The system takes a preliminary action by entering a dedicated programming mode where maintenance operations are disabled or delayed. This creates a clear separation between programming operations and maintenance operations, simplifying the management of system resources and reducing operational complexity while maintaining full system functionality through proper mode transitions.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The system segments operations into distinct modes: programming mode and normal operation mode. In programming mode, maintenance operations are isolated or disabled, while in normal operation mode, maintenance operations can proceed. This segmentation reduces the complexity of managing concurrent operations and improves resource allocation efficiency.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS20250383774A1Fast programming for memory systems
Publication Date: 2025.12.18 MICRON TECHNOLOGY INC
  • US20250383774A1 patent drawing
  • US20250383774A1 patent drawing
  • US20250383774A1 patent drawing

AI summary

Methods, systems, and devices for fast programming for memory systems are described. A memory system may include an interface with a host system. The memory system may receive an indication of a quantity of data that is to be received and written to the memory system while operating in a programming mode. The memory system may store the indication to a register as a value. The memory system may modify (e.g., decrement) the value of the register as data is written to the memory system. In response to the value of the register satisfying a threshold (e.g., reaching zero), the memory system may disable the programming mode. The memory system may disable or delay maintenance operations while operating in the programming mode to reduce writing latency and decrease programming times.