Multi-Plane Memory Programming With Neighbor Plane Disturb Detection

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Solution Overview

Problem

Memory cells in semiconductor devices can be disturbed during multi-plane programming due to neighbor plane disturb (NPD) defects, leading to unintended changes in neighboring planes, which are often undetected until after programming is complete.

Innovation Solution

A memory device with control circuitry that detects NPD defects during multi-plane programming by monitoring program voltage levels, terminates the operation before completion if a defect is detected, and transitions to single-plane programming to identify and correct the affected plane.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If multi-plane programming operation is performed to increase programming speed, then productivity is improved, but neighbor plane disturb defects cause data corruption and reliability deteriorates

Engineering Contradiction:

Improveprogramming speedVSAvoiddata integrity

Core Design Contradiction:

ProductivityVSReliability

Solution Approach 1:

The patent performs preliminary detection of NPD defects during the programming operation by monitoring program voltage levels. The control circuitry detects whether the program voltage reaches a target voltage level within a predetermined period, allowing early identification of defects before they cause data corruption, thus maintaining both high programming speed and data integrity

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The patent implements a feedback mechanism where the control circuitry continuously monitors program voltage levels during multi-plane programming and compares them against target thresholds. When an NPD defect is detected through voltage monitoring, the system provides feedback to terminate the programming operation, preventing data corruption while maintaining efficient programming operations

Inventive Principle:

Principle #23Feedback

2Loss of time

If multi-plane programming operation is performed to reduce programming time, then loss of time is reduced, but undetected NPD defects lead to overprogramming and reliability worsens

Engineering Contradiction:

Improveprogramming timeVSAvoidprogramming accuracy

Core Design Contradiction:

Loss of timeVSReliability

Solution Approach 1:

The system performs preliminary detection of NPD defects during the programming process by monitoring voltage levels, allowing early termination before overprogramming occurs. This maintains the time efficiency of multi-plane programming while ensuring programming accuracy through early defect detection

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The patent replaces post-programming verification with real-time electrical monitoring during programming. By substituting the mechanical/time-based completion approach with electrical voltage monitoring, the system achieves both time efficiency and programming accuracy simultaneously

Inventive Principle:

Principle #28Mechanics substitution (Replace mechanical system)

3Reliability

If NPD defect detection is implemented during programming, then reliability is improved, but device complexity increases due to additional control circuitry and monitoring requirements

Engineering Contradiction:

Improvedefect detection capabilityVSAvoidcontrol circuitry complexity

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

The control circuitry performs multiple functions: it controls the multi-plane programming operation, monitors program voltage levels, detects NPD defects, and terminates operations when necessary. By making the control circuitry multi-functional, the patent improves reliability through defect detection without proportionally increasing device complexity

Inventive Principle:

Principle #6Universality (Multi-functionality)

Solution Approach 2:

The control circuitry monitors its own operation by detecting voltage levels during programming. This self-monitoring capability allows the system to detect NPD defects and terminate operations autonomously, improving reliability while minimizing the need for additional external monitoring circuitry

Inventive Principle:

Principle #25Self-service

4Measurement precision

If program voltage monitoring is performed to detect NPD defects, then measurement precision is improved, but use of energy increases due to continuous monitoring requirements

Engineering Contradiction:

Improvevoltage detection accuracyVSAvoidenergy consumption

Core Design Contradiction:

Measurement precisionVSUse of energy by moving object

Solution Approach 1:

The control circuitry performs periodic monitoring of program voltage levels at specific intervals during the programming operation, rather than continuous monitoring. This periodic approach maintains sufficient measurement precision for NPD defect detection while reducing overall energy consumption compared to continuous monitoring

Inventive Principle:

Principle #19Periodic action

Data Source

PatentUS12580029B2Neighbor plane disturb (NPD) detection for memory devices

Publication Date: 2026.03.17 SANDISK TECHNOLOGIES LLC

AI summary

A memory device includes a plurality of memory cells arranged in a plurality of planes and control circuitry configured to perform a multi-plane programming operation in which memory cells in each of the plurality of planes are programmed in a single programming operation. To perform the multi-plane programming operation, the control circuity is configured to detect a neighbor plane disturb (NPD) defect during the multi-plane programming operation, in response to detecting the NPD defect, terminate the multi-plane programming operation prior to completing the multi-plane programming operation, and identify which plane of the plurality of planes includes the NPD defect.