Memory Cell Programming Pulses for Faster Verify-Controlled Writes
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Solution Overview
Problem
Existing memory devices face challenges in reducing the time required for program operations due to the use of fixed program pulses, which can lead to a sharp rise in threshold voltages and widened threshold voltage distributions, especially when applying the same voltage level to memory cells.
Innovation Solution
A memory device and method that control the application of fixed program pulses with varying voltage levels based on the target threshold voltage and the number of program loops, incorporating a verify operation to determine the voltage level and apply program inhibit voltages as needed, thereby optimizing the program speed and narrowing the threshold voltage distribution.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If fixed program pulses with the same voltage level are applied to memory cells, then the threshold voltage distribution can be kept narrow, but the program operation time increases
Solution Approach 1:
The patent applies dynamics by transitioning from static fixed voltage program pulses to dynamic accelerated pulses. The control logic dynamically adjusts the voltage level of program pulses based on the current program loop number and target threshold voltage, enabling the system to adaptively optimize programming speed while maintaining threshold voltage distribution control.
Solution Approach 2:
The patent changes the voltage parameter of program pulses based on the program loop number. Specifically, it determines a voltage level of accelerated program pulses based on the target threshold voltage and the current program loop number, thereby changing the pulse characteristics during the programming process to reduce operation time while maintaining distribution control.
2Loss of time
If program pulses with increasing amplitudes are applied to memory cells, then the program operation time is reduced, but the threshold voltage distribution widens
Solution Approach 1:
The patent changes the voltage parameter of program pulses based on the program loop number. Specifically, it determines a voltage level of accelerated program pulses based on the target threshold voltage and the current program loop number, thereby changing the pulse characteristics during the programming process to reduce operation time while maintaining distribution control.
Solution Approach 2:
The patent incorporates feedback through verify operations performed in each program loop. The control logic determines whether memory cells have reached the target threshold voltage and adjusts subsequent program pulse voltage levels accordingly, enabling closed-loop control of the programming process to maintain precision while improving speed.
3Device complexity
If fixed program pulses are applied to all memory cells, then the programming process is simplified, but overprogramming occurs
Solution Approach 1:
The patent applies local quality by differentiating the programming treatment for different memory cells based on their individual progress toward the target threshold voltage. The control logic identifies memory cells that have passed verification in previous loops and applies different voltage levels to different groups of cells, tailoring the programming approach to local conditions.
Solution Approach 2:
The patent performs preliminary verification operations before applying subsequent program pulses. By verifying memory cell status in advance and identifying cells that have reached the target threshold voltage, the system can prevent overprogramming by adjusting the voltage level for cells that have already been successfully programmed.
Data Source
AI summary
A memory device includes a memory cell array including a plurality of memory cells coupled to a word line. The memory device also includes a peripheral circuit configured to perform a program operation including a plurality of program loops including a program pulse apply operation and a verify operation. The memory device further includes control logic configured to control the peripheral circuit to determine a voltage level of fixed program pulses applied to memory cells having a same target threshold voltage based on the target threshold voltage and a number of program loops performed among the plurality of program loops, and to perform a verify operation on memory cells passing verification in a previous program loop performed prior to a current program loop being performed among the plurality of memory cells in the current program loop.