Solid State Memory Programming Rate Control via Analog Voltage
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Solution Overview
Problem
Traditional solid-state memory devices face inefficiencies in programming and reading operations due to their binary nature, which becomes increasingly troublesome as more bits are stored on each multi-level cell (MLC), leading to longer operation times and susceptibility to errors.
Innovation Solution
The memory devices utilize analog voltage signals to represent the threshold voltage of each memory cell across a continuum of possible voltages, allowing for single read and write operations that return complete data patterns rather than individual bits, and employ methods to control the programming rate of cells to ensure uniform programming.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If binary read/write operations are used in traditional solid-state memory, then device simplicity is maintained, but operation time increases and storage efficiency decreases as more bits are stored per multi-level cell
Solution Approach 1:
The patent changes the fundamental parameter of data representation from binary (discrete 0s and 1s) to analog (continuous voltage levels). Each memory cell's threshold voltage can assume any value within a range, allowing a single read operation to retrieve multiple bits of information simultaneously. This parameter change directly resolves the contradiction by enabling parallel information retrieval, thereby increasing storage efficiency while reducing operation time.
Solution Approach 2:
The patent transitions from one-dimensional binary data storage to multi-dimensional analog voltage storage. Instead of storing bits sequentially through multiple operations, the system utilizes the continuous voltage spectrum as an additional dimension, allowing multiple data values to be encoded in a single cell state. This dimensional expansion enables simultaneous retrieval of multiple bits, resolving the efficiency-time contradiction.
2Reliability
If programming rate is not controlled, then programming speed appears faster, but uniformity of programming across cells deteriorates and errors increase
Solution Approach 1:
The patent implements a feedback mechanism where the programming process is monitored and adjusted in real-time. The system measures the threshold voltage of each cell during programming and uses this feedback information to control the programming rate, ensuring that all cells reach their target voltage uniformly. This feedback loop resolves the contradiction by maintaining programming uniformity while preserving overall programming speed.
Solution Approach 2:
The patent applies dynamic control to the programming process, adjusting programming parameters based on real-time cell state. Rather than using a fixed programming rate for all cells, the system dynamically modifies programming conditions to match each cell's characteristics, ensuring uniform programming across the array while maintaining high productivity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach significantly reduces operation times and increases storage efficiency by enabling single operations to represent multiple bits, while controlling programming rates ensures uniformity and minimizes errors, enhancing the performance and reliability of solid-state memory devices.
Implementation Method 1
The memory devices utilize analog voltage signals to represent the threshold voltage of each memory cell across a continuum of possible voltages
Implementation Method 2
Changes in threshold voltage of the cells, through programming of charge storage or trapping layers or other physical phenomena, determine the data value of each cell
Data Source
AI summary
Memory devices adapted to receive and transmit analog data signals representative of bit patterns of two or more bits facilitate increases in data transfer rates relative to devices communicating data signals indicative of individual bits. Programming of such memory devices includes determining a rate of programming (i.e., rate of movement of the respective threshold voltage) of the memory cells and biasing the corresponding bit line with a programming rate control voltage that is greater than the bit line enable voltage and less than the inhibit voltage. This voltage can be adjusted to change the speed of programming. A capacitor coupled to the bit line stores the programming rate control voltage in order to maintain the proper bit line bias for the duration of the programming operation or until it is desired to change the programming rate.