Memory Programming Speed Adaptation for Threshold Voltage Control
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Solution Overview
Problem
Existing memory devices face challenges in achieving narrow threshold voltage distributions for high-density data storage due to over-programming issues, which can lead to read errors and performance variations over time, especially when using adaptive verify processes with slow programming speeds.
Innovation Solution
The implementation of a programming process that combines adaptive verify techniques with normal and slow programming speeds, where verify operations for memory cells are initiated based on the program progress of lower data states, and the use of different bit line voltages for sensing to optimize the timing of verification operations, thereby preventing over-programming and maintaining narrow threshold voltage distributions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If adaptive verify process with slow programming speed is used, then threshold voltage distribution becomes narrow, but programming time increases and over-programming occurs
Solution Approach 1:
The patent dynamically adjusts the programming speed by switching between normal and slow programming modes based on real-time verify results. The control circuit monitors threshold voltage distribution and automatically selects the appropriate programming speed to maintain narrow distributions while minimizing programming time.
Solution Approach 2:
The patent changes the programming parameter (speed) based on the state of threshold voltage distribution. By monitoring verify results and adjusting the programming speed parameter, the system optimizes both the narrowness of threshold voltage distribution and the overall programming time.
2Manufacturing precision
If adaptive verify process with slow programming speed is used, then threshold voltage distribution becomes narrow, but over-programming occurs leading to read errors
Solution Approach 1:
The patent implements a feedback mechanism where verify operations monitor the threshold voltage distribution in real-time during programming. The control circuit uses this feedback to determine when to switch between programming speeds and when to terminate programming, preventing over-programming and maintaining read reliability.
Solution Approach 2:
The patent performs verify operations at strategically timed points during the programming process to detect threshold voltage distribution trends before over-programming occurs. This preliminary verification allows the system to adjust programming speed proactively, preventing read errors before they happen.
3Productivity
If verify operations are initiated based on lower data state progress, then programming efficiency improves, but timing precision requirements increase
Solution Approach 1:
The patent initiates verify operations for higher data states based on the programming progress of lower data states. This preliminary verification approach allows the control circuit to prepare and execute verify operations in advance, improving programming efficiency while using straightforward control logic.
Data Source
AI summary
Techniques are provided to adaptively determine when to begin verify tests for memory cells during a program operation. The memory cells are programmed using a normal programming speed until their threshold voltage exceeds an initial verify voltage. The memory cells are then programmed further using a reduced programming speed until their threshold voltage exceeds a final verify voltage. In one aspect, a count of memory cells which exceeds the initial verify voltage is used to determine when to begin verify tests for a higher data state. In another aspect, a count of the higher state memory cells which exceeds the initial or final verify voltage is used to determine when to begin verify tests for the higher data state. The counted memory cells are not subject to the reduced programming speed.