Memory Cell Programming With Dynamic Start Voltage Feedback
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Solution Overview
Problem
Existing memory sub-systems face inefficiencies in level-by-level programming due to fixed start voltages leading to over- or under-programming, resulting in reduced read-window budget and performance issues.
Innovation Solution
Implementing dynamic start voltage (DSV) for level-by-level programming, where the start voltage for each program pulse is adjusted based on the voltage value of memory cells in a given distribution, improving retention and reducing time and power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If fixed start voltage is used for level-by-level programming, then programming process is simple, but read-window budget is reduced and programming precision deteriorates
Solution Approach 1:
The patent applies dynamics by transitioning from a fixed start voltage to a dynamic start voltage that adapts based on the voltage distribution of memory cells. The system determines the start voltage for each program pulse based on the actual voltage values of cells in the given distribution, making the programming process adaptive and responsive to real-time cell states, thereby improving programming precision without significantly increasing complexity
Solution Approach 2:
The patent implements feedback by using the voltage distribution information of memory cells to determine the start voltage for subsequent program pulses. The system continuously monitors the voltage values of cells and adjusts the start voltage accordingly, creating a closed-loop control mechanism that ensures accurate programming while maintaining process simplicity
2Loss of time
If fixed start voltage is used for level-by-level programming, then programming time is reduced, but programming accuracy deteriorates leading to over- or under-programming
Solution Approach 1:
The system dynamically adjusts the start voltage for each program pulse based on the actual voltage distribution of memory cells, allowing the programming process to adapt to varying cell states. This dynamic approach ensures accurate programming by tailoring the start voltage to the specific voltage distribution present, thereby achieving both time efficiency and programming accuracy
Solution Approach 2:
The patent changes the parameter of start voltage from a fixed value to a variable value that depends on the voltage distribution of memory cells. By adjusting the start voltage parameter based on actual cell conditions, the system achieves more accurate programming without requiring excessive time, as the voltage adjustment is performed efficiently during the programming process
3Use of energy by stationary object
If fixed start voltage is used for level-by-level programming, then power consumption is reduced, but retention performance deteriorates
Solution Approach 1:
The system dynamically determines the start voltage for each program pulse based on the voltage distribution of memory cells, optimizing the programming process to achieve better retention performance. By adapting the start voltage to actual cell conditions, the system ensures that cells are programmed to the correct voltage levels, improving retention without causing excessive power consumption
Solution Approach 2:
The patent uses feedback from voltage distribution measurements to determine the start voltage for programming, ensuring that the programming process is optimized for retention. This feedback mechanism allows the system to adjust the start voltage to achieve the desired retention performance while maintaining reasonable power consumption levels
Data Source
AI summary
Control logic in a memory device causes a first program pulse of multiple program pulses to be applied to a first set of cells in a memory array. The first program pulse has a first program voltage. The control logic causes a first verify pulse of multiple verify pulses to be applied to the first set of memory cell responsive to applying a first program pulse to the first set of memory cells. The first verify pulse determines a first quantity of cells of the first set of cells that satisfy a program threshold. The control logic determines a second program voltage based on the first quantity of cells. The control logic causes a second program pulse to be applied to a second set of cells in the memory array. The second program pulse has the second program voltage.


