Non-Volatile Memory Programming for Narrow Threshold Distributions

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Solution Overview

Problem

Non-volatile memory systems face challenges in reducing errors during data reading due to wide threshold voltage distributions, which can be exacerbated by varying programming speeds and inefficiencies in memory cell programming techniques.

Innovation Solution

The implementation of a dual-step programming technique that slows down programming after reaching an intermediate condition, using a program slowing voltage followed by a program inhibit voltage, to narrow threshold voltage distributions and enhance data reading accuracy.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If programming is performed at high speed, then productivity is improved, but threshold voltage distribution becomes wider which reduces reliability

Engineering Contradiction:
Improveprogramming speedVSAvoidthreshold voltage distribution
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The programming process is divided into multiple programming passes, each applying a controlled amount of programming pulse. Between passes, verification is performed to check if cells have reached the target state. This segmentation allows the system to accumulate programming effect gradually while monitoring and controlling the threshold voltage distribution, preventing excessive widening that would occur with single high-speed programming attempts.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The programming process uses periodic verification steps interspersed between programming pulses. After each programming pass, a verification operation checks the threshold voltage of programmed cells. This periodic action allows the system to pause programming when the distribution becomes too wide, perform verification, and adjust subsequent programming parameters, thereby maintaining reliability while achieving overall programming productivity.

Inventive Principle:
Principle #19Periodic action

2Productivity

If programming voltage is increased to speed up programming, then productivity is improved, but errors in data reading increase due to wider threshold voltage distributions

Engineering Contradiction:
Improveprogramming speedVSAvoiddata reading accuracy
Core Design Contradiction:
ProductivityVSMeasurement precision

Solution Approach 1:

The programming voltage amplitude is made dynamic rather than fixed. The system starts with higher voltage amplitudes to achieve fast initial programming, then progressively reduces the voltage amplitude in subsequent passes. This dynamic adjustment allows aggressive programming initially when distributions are narrow, then gentler programming as distributions widen, thereby maintaining reading accuracy while achieving overall productivity.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

Verification operations provide feedback about the threshold voltage state of programmed cells. The verification results inform whether additional programming passes are needed and at what voltage levels. This feedback mechanism allows the system to adapt programming parameters based on actual cell states, preventing over-programming that would widen distributions and reduce reading accuracy, while ensuring complete programming when needed for productivity.

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS20260031165A1Programming non-volatile memory with narrow threshold voltage distributions
Publication Date: 2026.01.29 SANDISK TECHNOLOGIES LLC
  • US20260031165A1 patent drawing
  • US20260031165A1 patent drawing
  • US20260031165A1 patent drawing

AI summary

To reduce errors when reading programmed data, a non-volatile memory programs data to narrower threshold voltage distributions by slowing down programming using a first technique for slowing programming after a memory cell reaches an intermediate condition and using a second technique for slowing programming after using the first technique and prior to inhibiting programming for the memory cell. In one embodiment, the first technique comprises applying a program slowing voltage to a bit line connected to the non-volatile memory cell while applying one dose of programming and the second technique comprises applying to the bit line the program slowing voltage for a first portion of a dose of programming and a program inhibit voltage for a second portion of the dose of programming.