Memory Programming Method for Multi-Bit Cell Threshold Voltage Control
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Solution Overview
Problem
Multi-bit cell memory devices face reliability issues and increased read-failure rates due to overlapping threshold voltage distributions as the number of bits stored in a single memory cell increases, leading to decreased voltage window distances between adjacent bits.
Innovation Solution
A memory programming method that identifies specific memory cells to adjust their threshold voltages to fit within defined intervals, allowing for precise programming of data pages by applying program condition voltages until the threshold voltages fall within targeted ranges, thereby reducing the impact of floating gate coupling and distribution distortion.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If the number of bits stored in a single memory cell increases, then data storage density is improved, but reliability deteriorates and read-failure rate increases
Solution Approach 1:
The patent segments the programming process into multiple stages, programming one bit at a time across multiple operations. Each bit is programmed separately with its own threshold voltage adjustment, preventing the distributions from overlapping and maintaining reliability while storing multiple bits in a cell.
Solution Approach 2:
The patent performs preliminary threshold voltage adjustment for each bit before final programming. By pre-adjusting the threshold voltage to the appropriate interval before programming the actual data, the system ensures that each bit's threshold voltage is properly positioned, preventing overlap and reducing read-failure rates.
2Quantity of substance
If the number of bits stored in a single memory cell increases, then data storage density is improved, but voltage window distance between adjacent bits decreases
Solution Approach 1:
The patent divides the voltage window into separate, non-overlapping intervals for each bit. By programming bits sequentially and adjusting threshold voltages individually, the system maintains distinct voltage windows for each bit even as multiple bits are stored in a single cell.
Solution Approach 2:
The patent applies different threshold voltage adjustments to different bits within the same memory cell. Each bit receives customized threshold voltage programming based on its specific requirements, allowing precise control of local voltage characteristics while maintaining overall data storage density.
3Quantity of substance
If threshold voltage distributions are programmed for multiple bits, then data storage capacity is improved, but distribution overlap increases
Solution Approach 1:
The patent performs preliminary threshold voltage adjustment for each bit before final programming. By pre-adjusting the threshold voltage to the appropriate interval before programming the actual data, the system ensures that each bit's threshold voltage is properly positioned, preventing overlap and reducing read-failure rates.
Solution Approach 2:
The patent incorporates verification steps after each programming operation to check whether the threshold voltage has been properly adjusted. This feedback mechanism allows the system to detect and correct distribution overlap, ensuring precise threshold voltage positioning for each bit while maintaining high data storage capacity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the reliability of multi-bit cell memory devices by minimizing threshold voltage distortion and overlap, reducing read-failure rates and maintaining data accuracy across multiple bits.
Implementation Method 1
Example embodiments may reduce the effect of floating gate (FG) coupling during programming of a memory cell
Data Source
AI summary
A memory programming method may include identifying at least one of a plurality of memory cells with a threshold voltage to be changed based on a pattern of data to be programmed in the at least one of the plurality of memory cells, applying a program condition voltage to the at least one identified memory cell until the threshold voltage of the at least one identified memory cell is included in a first threshold voltage interval, to thereby adjust the threshold voltage of the at least one identified memory cell, and programming the data in the at least one identified memory cell with the adjusted threshold voltage.