Non-volatile Memory Programming Voltage Control

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Solution Overview

Problem

Current non-volatile memory devices require a prolonged time period for programming memory cells due to the need for various voltage settings, which hampers operation performance.

Innovation Solution

A non-volatile memory device with a control logic circuit that applies a program word line voltage with stepwise voltage levels and a program bit line voltage with specific voltage levels to inhibit or program memory cells, reducing the programming time by controlling voltage transitions and levels.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If various types of program voltages are applied to word lines and bit lines for programming memory cells, then programming capability is achieved, but the time period required for programming increases

Engineering Contradiction:
Improveprogramming capabilityVSAvoidprogramming time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent divides the programming operation into multiple time intervals (first time interval and second time interval) with different voltage levels. During the first time interval, a first program voltage is applied to the bit line, and during the second time interval, a second program voltage is applied. This segmentation allows different groups of memory cells to be programmed at different times, reducing the total programming time while maintaining programming capability.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent employs periodic voltage application with distinct phases. The control logic circuit periodically switches between different voltage levels on word lines and bit lines across multiple time intervals. This periodic action enables systematic programming of memory cells in waves, improving programming speed without sacrificing reliability.

Inventive Principle:
Principle #19Periodic action

2Manufacturing precision

If multiple voltage levels are applied to control programming of memory cells, then programming precision is improved, but device complexity increases

Engineering Contradiction:
Improveprogramming precisionVSAvoidcontrol circuit complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The control logic circuit dynamically adjusts voltage levels on word lines and bit lines based on the current time interval and the programming status of memory cells. The circuit transitions between different operational states (first program mode, second program mode) with different voltage configurations, enabling precise control of programming while managing complexity through state-based management.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes voltage parameters (magnitude and polarity) of program voltages applied to word lines and bit lines across different time intervals. By varying these electrical parameters systematically, the patent achieves precise control over memory cell programming states without requiring additional hardware components, thus managing device complexity.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS11200952B2Non-volatile memory device
Publication Date: 2021.12.14 SAMSUNG ELECTRONICS CO LTD
  • US11200952B2 patent drawing
  • US11200952B2 patent drawing
  • US11200952B2 patent drawing

AI summary

A non-volatile memory device comprises a memory cell region including a first metal pad, a peripheral circuit region including a second metal pad and vertically connected to the memory cell region by the first metal pad and the second metal pad, a memory cell array in the memory cell region including a plurality of memory cells, each of the memory cells being connected to a plurality of word lines in the memory cell region and a plurality of bit lines in the memory cell region, and a control logic circuit in the peripheral circuit region configured to control voltages to be applied to the plurality of word lines and the plurality of bit lines.