Memory Protection Circuit with In-Write Integrity Verification
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Solution Overview
Problem
Existing electronic devices face vulnerabilities where data stored in memory can be corrupted or modified after verification by sequencers or hardware security modules, especially due to memory corruption attacks, compromising the integrity of firmware and other data.
Innovation Solution
A memory protection circuit that iteratively computes an integrity verification value as data is written to memory, comparing it with a reference value to control access and block unauthorized modifications, integrated with the memory controller to ensure data integrity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If separate sequencers or hardware security modules are used to verify data integrity, then data integrity protection is improved, but device complexity increases
Solution Approach 1:
The patent combines the data integrity verification function directly into the memory controller, merging what were previously separate components (memory controller and security verification module) into a single integrated unit. This eliminates the need for separate sequencers or hardware security modules while maintaining data integrity protection, thereby reducing device complexity without sacrificing reliability
Solution Approach 2:
The memory controller is enhanced to perform multiple functions: it not only manages memory operations but also computes integrity verification values, compares them with reference values, and controls access to memory regions. This multi-functional approach consolidates security verification tasks into an existing component, avoiding the addition of separate dedicated security hardware
2Reliability
If separate sequencers or hardware security modules are used for verification, then verification capability is improved, but manufacturing cost increases
Solution Approach 1:
By merging the verification functionality into the memory controller, the patent reduces the total component count and bill of materials. Instead of manufacturing separate security modules and assembling them with the memory controller, the verification capability is integrated into a single manufacturable unit, simplifying the manufacturing process and reducing costs
3Reliability
If data is verified after writing to memory, then data integrity is ensured, but computational overhead increases
Solution Approach 1:
The patent computes the integrity verification value during the data writing process itself, rather than after writing is complete. The memory controller iteratively updates the verification value as each portion of data is written, so that verification computation is performed in parallel with the writing operation. This preliminary action approach ensures data integrity while minimizing additional computational overhead and energy consumption
Data Source
AI summary
A memory protection circuit is configured to: receive data to be written to a memory; iteratively update a running integrity verification value based on portions of the data to determine a calculated integrity verification value and write the portions of the data to a memory region in the memory; determine a verification result based on a comparison between the calculated integrity verification value and a reference integrity verification value associated with the data; and control access to the memory region of the memory based on the verification result.