Multiprocessor Memory Protection Unit with Dual Access Control
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Solution Overview
Problem
Existing memory protection systems in multiprocessing environments face challenges in effectively preventing unauthorized access to memory devices, particularly from software errors and unintended programming of access control units, which can lead to illegal memory access.
Innovation Solution
A memory protection unit employing two access control units, where one unit protects against unwanted access by different processing devices and the other against software errors, utilizing a hardware unit with a lock register and periodic checks to ensure correct programming and access rights, and a safe core for fault detection and system control.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a single access control unit is used, then the device complexity is reduced, but the reliability of memory protection is insufficient
Solution Approach 1:
The access control function is divided into two separate units: a first access control unit that protects memory against unwanted access by different processing devices, and a second access control unit that protects memory against software errors. This segmentation allows each unit to specialize in specific protection functions, improving overall reliability while keeping individual units relatively simple.
Solution Approach 2:
The second access control unit is designed to be programmable only during specific periods (initialization phase) and is locked during normal operation. This beforehand cushioning mechanism prevents software errors from occurring in the first place by restricting programming capability to safe time windows, rather than relying on continuous monitoring and correction.
2Reliability
If the second access control unit is always programmable, then the ease of operation is improved, but the reliability is reduced due to software errors
Solution Approach 1:
The programmability of the second access control unit is made dynamic rather than static. It transitions between two states: programmable during initialization phase and non-programmable during normal operation. This dynamic state change allows the system to balance ease of operation (programming capability) with reliability (error prevention) at different times.
Solution Approach 2:
The second access control unit is programmed during the initialization phase before normal operation begins. This preliminary action ensures that correct access rights are established before any processing devices start operating, preventing software errors from occurring during normal operation while maintaining ease of operation during the setup phase.
3Reliability
If periodic checks are implemented, then the reliability is improved, but the use of energy and time is increased
Solution Approach 1:
The system implements periodic checks where processing devices verify access rights at specific intervals rather than continuously. This periodic verification maintains reliability by ensuring access rights remain correct while reducing the time and energy consumption compared to continuous monitoring. The checks occur during natural system cycles such as task switching or memory access operations.
Data Source
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AI summary
A memory protection unit (14, 15, 16) comprising at least a first access control unit (31) and a second access control unit (32) programmed for controlling an access to a memory device (17). Further a method to operate a processing system comprising multiple processing devices (11, 12, 13) and multiple memory protection units (14, 15, 16) associated to the multiple processing devices (11, 12, 13). The access to the memory by a processing device is approved if first access control unit (31) and second access control unit (32) of the memory protection (14, 15, 16) associated to the processing device (11, 12, 13) approves the access and access is rejected if first access control unit (31) or second access control unit (32) rejects the access. The first access control unit (31) is programmable by the associated processing device alone and the programming of the second access control unit 32 is readable by an additional processing device which is to be used in a system with multiple programming device, not the associate processing device.