Non-Volatile Memory Protection Logic Circuit

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Solution Overview

Problem

Existing non-volatile memory devices lack effective protection against unexpected destructive access, which can lead to data corruption and system malfunctions, especially with the advent of safety standards like ISO26262, and existing solutions do not adequately ensure secure comparison results.

Innovation Solution

A memory device with a protection unit that processes unlock, write, or erase commands using a logic circuit with subcircuits comparing command parts to hard-coded keys, outputting an enabling signal only if both parts match, and includes a sequencer to manage access and set operational flags, ensuring safe memory access and detecting unexpected destructive access.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If a single protect flag is used to control write access, then the device complexity is reduced, but the reliability of memory protection deteriorates because a faulty flag can allow unauthorized writes

Engineering Contradiction:
Improveprotection mechanism complexityVSAvoidmemory protection reliability
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The single protect flag is segmented into multiple protect flags (first protect flag and second protect flag). Each flag is independently controlled by separate logic circuits that compare different parts of the command with hard-coded keys. This segmentation ensures that a fault in one flag does not compromise the entire protection system, thereby improving reliability while maintaining manageable complexity through modular design.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Hard-coded keys are introduced as intermediaries between the command and the protect flags. The logic circuits compare command parts with these hard-coded keys to determine whether to set the protect flags. This intermediary layer adds a verification step that prevents unauthorized writes even if a protect flag becomes faulty, improving reliability without significantly increasing overall system complexity.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Ease of operation

If cryptographic keys are stored within the memory, then the ease of operation is improved, but the reliability deteriorates because faulty memory can compromise security

Engineering Contradiction:
Improvekey management easeVSAvoidsecurity reliability
Core Design Contradiction:
Ease of operationVSReliability

Solution Approach 1:

The cryptographic keys are extracted from the volatile memory and replaced with hard-coded keys that are permanently embedded in the logic circuits. This extraction eliminates the risk of key corruption from memory faults while maintaining ease of operation because the hard-coded keys are automatically available during command verification without requiring separate storage or retrieval operations.

Inventive Principle:
Principle #2Taking out (Extraction)

3Ease of operation

If a simple protect flag mechanism is used, then the ease of operation is improved, but the ability to detect unexpected destructive access deteriorates

Engineering Contradiction:
Improveaccess control easeVSAvoiddestructive access detection capability
Core Design Contradiction:
Ease of operationVSDifficulty of detecting and measuring

Solution Approach 1:

The system implements feedback by monitoring the states of multiple protect flags and comparing them against expected values after write or erase operations. The logic circuits continuously verify whether the protect flags are in the correct state, and if an unexpected destructive access occurs (e.g., a write when flags indicate protection), the system detects the discrepancy and can trigger error handling or prevent further operations, thereby improving detection capability while maintaining ease of operation through automatic monitoring.

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS11281576B2Memory device
Publication Date: 2022.03.22 MELEXIS TECH NV
  • US11281576B2 patent drawing
  • US11281576B2 patent drawing
  • US11281576B2 patent drawing

AI summary

A memory device includes a non-volatile memory block, a protection unit arranged for connecting to a communication bus, and a sequencer arranged to receive commands from the protection unit. A logic circuit is arranged to output an enabling signal, and includes first and second logic subcircuits, and a combiner logic circuit.