Memory Protection Unit Address Range Segmentation

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Solution Overview

Problem

Current memory protection units in data processing systems face inefficiencies due to increased complexity and latency with a higher number of address ranges, which can reduce CPU frequency and increase access latency, while also requiring re-programming for different tasks and privilege levels.

Innovation Solution

A memory protection unit comprising an address evaluator, an address results combiner, and a data register that maps address ranges to access protection groups, allowing for flexible access control by evaluating and combining results to grant or deny access based on privilege levels, thereby reducing complexity and latency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If a higher number of address ranges is used to provide detailed handling of memory access, then memory protection precision is improved, but access evaluation time increases

Engineering Contradiction:
Improvememory protection precisionVSAvoidaccess evaluation time
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The patent segments the address space into multiple address ranges, each mapped to specific access protection groups. The address evaluator divides the evaluation process by checking address parameters against predefined ranges and combining results based on protection group mappings, enabling detailed protection without evaluating all possible address combinations

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The system performs preliminary actions by pre-defining address ranges and their mappings to access protection groups before access evaluation occurs. This pre-configuration allows the address evaluator to quickly determine access permissions without complex runtime calculations, reducing evaluation time while maintaining precision

Inventive Principle:
Principle #10Preliminary action

2Measurement precision

If more address ranges are configured for detailed memory protection, then protection granularity is improved, but device complexity increases

Engineering Contradiction:
Improveprotection granularityVSAvoidmemory protection complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The address evaluator and address results combiner are designed as universal components that handle multiple address ranges and access protection groups through a unified evaluation process. The data register stores configurable mappings that can accommodate different protection scenarios without requiring separate hardware structures for each case

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent introduces a new dimension of organization by mapping address ranges to access protection groups through a structured data register. This dimensional organization allows the system to manage complexity by structuring the relationship between address ranges and protection levels in a systematic way, rather than using ad-hoc configuration methods

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Adaptability or versatility

If memory protection unit is re-programmed for different tasks and privilege levels, then adaptability is improved, but processing time increases

Engineering Contradiction:
Improvetask adaptabilityVSAvoidre-programming time
Core Design Contradiction:
Adaptability or versatilityVSLoss of time

Solution Approach 1:

The system implements dynamic adaptability by allowing the data register to store configurable mappings between address ranges and access protection groups. These mappings can be adjusted for different tasks and privilege levels without requiring complete re-programming of the protection unit, enabling flexible adaptation while maintaining fast evaluation performance

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS10372630B2Memory protecting unit and method for protecting a memory address space
Publication Date: 2019.08.06 INFINEON TECHNOLOGIES AG
  • US10372630B2 patent drawing
  • US10372630B2 patent drawing
  • US10372630B2 patent drawing

AI summary

A memory protector is configured to evaluate access requests referring to a memory address space. The access requests comprise address parameters referring to addresses of the memory address space. The memory protector comprises an address evaluator, an address results combiner, and a data register. The address evaluator is configured to evaluate whether the address parameters refer to address ranges of a set of address ranges and is configured to provide results regarding the address ranges. The address results combiner is configured to combine results provided by the address evaluator depending on access protection groups to which the address ranges are mapped to. The memory protector is configured to provide access grant results based on combinations provided by the address results combiner. The data register is configured to store data concerning the set of address ranges and concerning a mapping of the address ranges to the access protection groups.